k8e(e(,chipspark,rayeager-px2rockchip,rk3066a 7Rayeager PX2aliases=/ethernet@10204000G/i2c@2002d000L/i2c@2002f000Q/i2c@20056000V/i2c@2005a000[/i2c@2005e000`/serial@10124000h/serial@10126000p/serial@20064000x/serial@20068000/spi@20070000/spi@20074000/mmc@10214000/mmc@10218000/mmc@1021c000oscillator ,fixed-clockn6xin24mUgpu@10090000",rockchip,rk3066-maliarm,mali-400  buscore x disabledx5&gpgpmmupp0ppmmu0pp1ppmmu1pp2ppmmu2pp3ppmmu36video-codec@10104000,rockchip,rk3066-vpu@   &vepuvdpu (aclk_vdpuhclk_vdpuaclk_vepuhclk_vepu6cache-controller@10138000,arm,pl310-cacheDRHscu@1013c000,arm,cortex-a9-scuglobal-timer@1013c200,arm,cortex-a9-global-timer    disabledlocal-timer@1013c600,arm,cortex-a9-twd-timer   interrupt-controller@1013d000,arm,cortex-a9-gic^sserial@10124000&,rockchip,rk3066-uartsnps,dw-apb-uart@ "baudclkapb_pclk@Lokaytxrxdefault serial@10126000&,rockchip,rk3066-uartsnps,dw-apb-uart` #baudclkapb_pclkAM disabledtxrxdefaultqos@1012d000,rockchip,rk3066-qossyscon )qos@1012e000,rockchip,rk3066-qossyscon (qos@1012f000,rockchip,rk3066-qossyscon "qos@1012f080,rockchip,rk3066-qossyscon $qos@1012f100,rockchip,rk3066-qossyscon &qos@1012f180,rockchip,rk3066-qossyscon #qos@1012f200,rockchip,rk3066-qossyscon %qos@1012f280,rockchip,rk3066-qossyscon 'usb@10180000,rockchip,rk3066-usbsnps,dwc2 otgotg@@   usb2-phyokayusb@101c0000 ,snps,dwc2 otghost  usb2-phyokaydefault ethernet@10204000,rockchip,rk3066-emac @<  D hclkmacrefd rmiiokay)-default mdioethernet-phy@0 8mmc@10214000,rockchip,rk2928-dw-mshc!@ Hbiuciurx-txD QOresetokay[defaultis~mmc@10218000,rockchip,rk2928-dw-mshc! Ibiuciurx-txD ROresetokaydefault i~mmc@1021c000,rockchip,rk2928-dw-mshc! Jbiuciurx-txD SOresetokayidefault  ~!!nand-controller@10500000,rockchip,rk2928-nfcP@ ahb disabledpmu@20004000&,rockchip,rk3066-pmusysconsimple-mfd @reboot-mode,syscon-reboot-mode@RBRBRB RBpower-controller!,rockchip,rk3066-power-controllerpower-domain@7PO"#$%&'power-domain@6 (power-domain@8)grf@20008000&,rockchip,rk3066-grfsysconsimple-mfd  usbphy,rockchip,rk3066a-usb-phyokayusb-phy@17c|Qphyclk  usb-phy@188Rphyclk  dma-controller@20018000,arm,pl330arm,primecell @+6Q apb_pclkdma-controller@2001c000,arm,pl330arm,primecell @+6Q apb_pclk disabledi2c@2002d000,rockchip,rk3066-i2c  ( i2cPokaydefault*ak8963@d,asahi-kasei,ak8975 +default,mma8452@1d ,fsl,mma8452+default-i2c@2002f000,rockchip,rk3066-i2c  ) Qi2cokaydefault.tps@2d-/default01h2t2223322 ,ti,tps65910regulatorsregulator@0vcc_rtcvrtcregulator@1vcc_io2Z2Zvio3regulator@2vdd_arm '`1vdd1Iregulator@3vcc_ddr '`1vdd2regulator@5vcc18w@w@vdig1regulator@6vdd_11vdig2regulator@7vcc_25&%&%vpll?regulator@8 vccio_wlw@w@vdacregulator@9 vcc25_hdmi&%&% vaux1regulator@10vcca_332Z2Z vaux2regulator@11 vcc_rmii2Z2Z vaux33regulator@12 vcc28_cif** vmmcregulator@4vdd3regulator@13 vbbpwm@20030000,rockchip,rk2928-pwm CF disableddefault4pwm@20030010,rockchip,rk2928-pwm CFokaydefault5watchdog@2004c000 ,rockchip,rk3066-wdtsnps,dw-wdt K 3okaypwm@20050020,rockchip,rk2928-pwm  CGokaydefault6pwm@20050030,rockchip,rk2928-pwm 0CGokaydefault7[i2c@20056000,rockchip,rk3066-i2c ` * Ri2cokaydefault8i2c@2005a000,rockchip,rk3066-i2c  + Si2cokaydefault9i2c@2005e000,rockchip,rk3066-i2c  4 Ti2cokaydefault:serial@20064000&,rockchip,rk3066-uartsnps,dw-apb-uart @ $baudclkapb_pclkBNokaytxrxdefault;serial@20068000&,rockchip,rk3066-uartsnps,dw-apb-uart  %baudclkapb_pclkCOokay txrxdefault <=>saradc@2006c000,rockchip,saradc  NGJsaradcapb_pclk W Osaradc-apbokay`?spi@20070000,rockchip,rk3066-spiEHspiclkapb_pclk &   txrxokaydefault@ABCspi@20074000,rockchip,rk3066-spiFIspiclkapb_pclk ' @  txrx disableddefaultDEFGdma-controller@20078000,arm,pl330arm,primecell @+6Q apb_pclkcpuslrockchip,rk3066-smpcpu@0zcpu,arm,cortex-a9H8@ Oa* s* 'g8@Icpu@1zcpu,arm,cortex-a9HIdisplay-subsystem,rockchip,display-subsystemJKsram@10080000 ,mmio-sram smp-sram@0,rockchip,rk3066-smp-sramPvop@1010c000,rockchip,rk3066-vop  aclk_vopdclk_vophclk_vop6 def Oaxiahbdclk disabledportJendpoint@0LPvop@1010e000,rockchip,rk3066-vop aclk_vopdclk_vophclk_vop6 ghi Oaxiahbdclk disabledportKendpoint@0MQhdmi@10116000,rockchip,rk3066-hdmi`  @hclkdefaultNO6  disabledportsport@0endpoint@0PLendpoint@1QMport@1i2s@10118000,rockchip,rk3066-i2s  defaultRKi2s_clki2s_hclktxrx disabledi2s@1011a000,rockchip,rk3066-i2s   defaultSLi2s_clki2s_hclktxrx disabledi2s@1011c000,rockchip,rk3066-i2s  defaultTMi2s_clki2s_hclk  txrx disabledclock-controller@20000000,rockchip,rk3066a-cru Uxin24m $@^_ ׄ#gрxhрxhtimer@2000e000,snps,dw-apb-timer  .VD timerpclkefuse@20010000,rockchip,rk3066a-efuse @[ pclk_efusecpu_leakage@17timer@20038000,snps,dw-apb-timer  ,TB timerpclktimer@2003a000,snps,dw-apb-timer  -UC timerpclktsadc@20060000,rockchip,rk3066-tsadc ]]saradcapb_pclk N \ Osaradc-apb disabledpinctrl,rockchip,rk3066a-pinctrl gpio@20034000,rockchip,gpio-bank @ 6U1A^s`gpio@2003c000,rockchip,gpio-bank  7V1A^sgpio@2003e000,rockchip,gpio-bank  8W1A^sgpio@20080000,rockchip,gpio-bank  9X1A^s^gpio@20084000,rockchip,gpio-bank @ :Y1A^s+gpio@2000a000,rockchip,gpio-bank  <Z1A^s/pcfg-pull-defaultMXpcfg-pull-nonecVemacemac-xferpVVVVVVVVemac-mdio pVVrmii-rstpWemmcemmc-clkpXemmc-cmdp Xemmc-rstp X hdmihdmi-hpdpXOhdmii2c-xfer pVVNi2c0i2c0-xfer pVV*i2c1i2c1-xfer pVV.i2c2i2c2-xfer pVV8i2c3i2c3-xfer pVV9i2c4i2c4-xfer pVV:pwm0pwm0-outpV4pwm1pwm1-outpV5pwm2pwm2-outpV6pwm3pwm3-outpV7spi0spi0-clkpX@spi0-cs0pXCspi0-txpXAspi0-rxpXBspi0-cs1pXspi1spi1-clkpXDspi1-cs0pXGspi1-rxpXFspi1-txpXEspi1-cs1pXuart0uart0-xfer pXXuart0-ctspXuart0-rtspXuart1uart1-xfer pXXuart1-ctspXuart1-rtspXuart2uart2-xfer pX X;uart3uart3-xfer pXX<uart3-ctspX=uart3-rtspX>sd0sd0-clkpXsd0-cmdp Xsd0-cdpXsd0-wppXsd0-bus-width1p Xsd0-bus-width4@p X X X Xsd1sd1-clkpXsd1-cmdpXsd1-cdpXsd1-wppXsd1-bus-width1pXsd1-bus-width4@pXXXXi2s0i2s0-buspXX X X X X XXXRi2s1i2s1-bus`pXXXXXXSi2s2i2s2-bus`pXXXXXXTpcfg-output-high~Wak8963comp-intpX,irir-intpXYkeyspwr-keypXZmma8452gsensor-intpX-mmcsdmmc-pwrpX_usb_hosthost-drvpXahub-rstpW sata-pwrpX\sata-resetp W usb_otgotg-drvpXbtpspmic-intpX0pwr-holdpW1memory@60000000zmemory`@ir-receiver,gpio-ir-receiver >/defaultYgpio-keys ,gpio-keyskey-power >/ GPIO PowertdefaultZvdd-log,pwm-regulator [vdd_logOOB@dO*okayvsys-regulator,regulator-fixedvsysLK@LK@12stdby-regulator,regulator-fixed 5v_stdbyLK@LK@1]emmc-regulator,regulator-fixed emmc_vccq--2!sata-regulator,regulator-fixed +default\usb_5vLK@LK@]sdmmc-regulator,regulator-fixed ^default_vcc_sd2Z2Z3usb-host-regulator,regulator-fixed `defaulta host-pwrLK@LK@]usb-otg-regulator,regulator-fixed `defaultbvcc_otgLK@LK@] #address-cells#size-cellsinterrupt-parentcompatiblemodelethernet0i2c0i2c1i2c2i2c3i2c4serial0serial1serial2serial3spi0spi1mmc0mmc1mmc2clock-frequency#clock-cellsclock-output-namesphandleregclocksclock-namesassigned-clocksassigned-clock-ratesresetsstatusinterruptsinterrupt-namespower-domainscache-unifiedcache-levelinterrupt-controller#interrupt-cellsreg-shiftreg-io-widthdmasdma-namespinctrl-namespinctrl-0dr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephysphy-namesrockchip,grfmax-speedphy-modephyphy-supplyreset-gpiosfifo-depthreset-namesmax-frequencybus-widthdisable-wpvmmc-supplycap-mmc-highspeedcap-sd-highspeednon-removablevqmmc-supplyoffsetmode-normalmode-recoverymode-bootloadermode-loader#power-domain-cellspm_qos#phy-cells#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvccio-supplyregulator-nameregulator-always-onregulator-compatibleregulator-min-microvoltregulator-max-microvoltregulator-boot-on#pwm-cells#io-channel-cellsvref-supplyenable-methoddevice_typenext-level-cacheoperating-pointsclock-latencycpu-supplyportsrangesremote-endpointrockchip,playback-channelsrockchip,capture-channels#sound-dai-cells#reset-cellsgpio-controller#gpio-cellsbias-pull-pin-defaultbias-disablerockchip,pinsoutput-highwakeup-sourcelabellinux,codepwmsvoltage-tablevin-supplyenable-active-highgpiostartup-delay-us