^?8TH( Tcompulab,omap5-cm-t54ti,omap5&7CompuLab CM-T54chosenaliases?=/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0?B/ocp/interconnect@48000000/segment@0/target-module@72000/i2c@0?G/ocp/interconnect@48000000/segment@0/target-module@60000/i2c@0?L/ocp/interconnect@48000000/segment@0/target-module@7a000/i2c@0?Q/ocp/interconnect@48000000/segment@0/target-module@7c000/i2c@0?V/ocp/interconnect@48000000/segment@0/target-module@9c000/mmc@0?[/ocp/interconnect@48000000/segment@0/target-module@b4000/mmc@0?`/ocp/interconnect@48000000/segment@0/target-module@ad000/mmc@0?e/ocp/interconnect@48000000/segment@0/target-module@d1000/mmc@0?j/ocp/interconnect@48000000/segment@0/target-module@d5000/mmc@0Bo/ocp/interconnect@48000000/segment@0/target-module@6a000/serial@0Bw/ocp/interconnect@48000000/segment@0/target-module@6c000/serial@0B/ocp/interconnect@48000000/segment@0/target-module@20000/serial@0B/ocp/interconnect@48000000/segment@0/target-module@6e000/serial@0B/ocp/interconnect@48000000/segment@0/target-module@66000/serial@0B/ocp/interconnect@48000000/segment@0/target-module@68000/serial@0 /ocp/dsp/ocp/ipu@55020000 /connector0 /connector1 /displaycpuscpu@0cpuarm,cortex-a15B@,`cpu %cpu@1cpuarm,cortex-a15B@,`cpu thermal-zonescpu_thermal-CQaAtripscpu_alertnzpassive%cpu_critnHz criticalcooling-mapsmap0 gpu_thermal-CQauPtripsgpu_critnHz criticalcore_thermal-CQatripscore_critnHz criticaltimerarm,armv7-timer0   &pmuarm,cortex-a15-pmusram@40300000 mmio-sram@0%interrupt-controller@48211000arm,cortex-a15-gic@H!H! H!@ H!` &%interrupt-controller@48281000&ti,omap5-wugen-mputi,omap4-wugen-mpuH(&%ocpsimple-pm-bus$ ߀l3-noc@44000000ti,omap5-l3-nocD D0E@  interconnect@4ae00000ti,omap5-l4-wkupsimple-pm-bus  fckJJJ aplaia0$JJJsegment@0simple-pm-bus`` @@PPtarget-module@4000ti,sysc-omap2ti,sysc@@ revsysc 0fck @counter@0ti,omap-counter32k@target-module@6000ti,sysc-omap4ti,sysc`rev ` prm@0ti,omap5-prmsimple-bus     clockssys_clkin@110 ti,mux-clock sys_clkin"%abe_dpll_bypass_clk_mux@108 ti,mux-clockabe_dpll_bypass_clk_mux%6abe_dpll_clk_mux@10c ti,mux-clockabe_dpll_clk_mux %5custefuse_sys_gfclk_divfixed-factor-clockcustefuse_sys_gfclk_div9Ddss_syc_gfclk_divfixed-factor-clockdss_syc_gfclk_div9D%Mwkupaon_iclk_mux@108 ti,mux-clockwkupaon_iclk_mux%l3instr_ts_gclk_divfixed-factor-clockl3instr_ts_gclk_div9Dclockdomainswkupaon_cm@1900 ti,omap4-cm wkupaon_cm clk@20 ti,clkctrlwkupaon_clkctrl \% prm@300#ti,omap5-prm-instti,omap-prm-instN%prm@400#ti,omap5-prm-instti,omap-prm-instbN%oprm@500#ti,omap5-prm-instti,omap-prm-instN%prm@600#ti,omap5-prm-instti,omap-prm-instNprm@700#ti,omap5-prm-instti,omap-prm-instbN%prm@1200#ti,omap5-prm-instti,omap-prm-instbNprm@1300#ti,omap5-prm-instti,omap-prm-instNprm@1400#ti,omap5-prm-instti,omap-prm-instN%prm@1500#ti,omap5-prm-instti,omap-prm-instNprm@1600#ti,omap5-prm-instti,omap-prm-instN%rprm@1700#ti,omap5-prm-instti,omap-prm-instNprm@1800#ti,omap5-prm-instti,omap-prm-instN% prm@1a00#ti,omap5-prm-instti,omap-prm-instNprm@1c00#ti,omap5-prm-instti,omap-prm-instbtarget-module@a000ti,sysc-omap4ti,syscrev scrm@0ti,omap5-scrmclocksauxclk0_src_gate_ck@310 ti,composite-no-wait-gate-clockauxclk0_src_gate_cko%auxclk0_src_mux_ck@310ti,composite-mux-clockauxclk0_src_mux_ck o%auxclk0_src_ckti,composite-clockauxclk0_src_ck%auxclk0_ck@310ti,divider-clock auxclk0_cko|%*auxclk1_src_gate_ck@314 ti,composite-no-wait-gate-clockauxclk1_src_gate_cko%auxclk1_src_mux_ck@314ti,composite-mux-clockauxclk1_src_mux_ck o%auxclk1_src_ckti,composite-clockauxclk1_src_ck% auxclk1_ck@314ti,divider-clock auxclk1_ck o|%+auxclk2_src_gate_ck@318 ti,composite-no-wait-gate-clockauxclk2_src_gate_cko%!auxclk2_src_mux_ck@318ti,composite-mux-clockauxclk2_src_mux_ck o%"auxclk2_src_ckti,composite-clockauxclk2_src_ck!"%#auxclk2_ck@318ti,divider-clock auxclk2_ck#o|%,auxclk3_src_gate_ck@31c ti,composite-no-wait-gate-clockauxclk3_src_gate_cko%$auxclk3_src_mux_ck@31cti,composite-mux-clockauxclk3_src_mux_ck o%%auxclk3_src_ckti,composite-clockauxclk3_src_ck$%%&auxclk3_ck@31cti,divider-clock auxclk3_ck&o|%-auxclk4_src_gate_ck@320 ti,composite-no-wait-gate-clockauxclk4_src_gate_cko %'auxclk4_src_mux_ck@320ti,composite-mux-clockauxclk4_src_mux_ck o %(auxclk4_src_ckti,composite-clockauxclk4_src_ck'(%)auxclk4_ck@320ti,divider-clock auxclk4_ck)o| %.auxclkreq0_ck@210 ti,mux-clockauxclkreq0_ck*+,-.oauxclkreq1_ck@214 ti,mux-clockauxclkreq1_ck*+,-.oauxclkreq2_ck@218 ti,mux-clockauxclkreq2_ck*+,-.oauxclkreq3_ck@21c ti,mux-clockauxclkreq3_ck*+,-.oclockdomainstarget-module@c000ti,sysc-omap4ti,syscrev pinmux@840 ti,omap5-padconfpinctrl-single@<pinmux_ads7846_pins%|pinmux_palmas_sys_nirq_pins(%vomap5_scm_wkup_pad_conf@da0&ti,omap5-scm-wkup-pad-confsimple-bus ` `scm_conf@0sysconsimple-bus` `clocks@0fref_xtal_ckti,gate-clock fref_xtal_ckosegment@10000simple-pm-bus`@@PPtarget-module@0ti,sysc-omap2ti,syscrevsyscsyss   fckdbclk gpio@0ti,omap4-gpio !%~target-module@4000ti,sysc-omap2ti,sysc@@@revsyscsyss" fck @wdt@0ti,omap5-wdtti,omap3-wdt Ptarget-module@8000ti,sysc-omap4-timerti,sysc revsysc fck -Atimer@0ti,omap5430-timer fcktimer_sys_ck %L [ ktarget-module@c000ti,sysc-omap2ti,sysc revsysc"  Xfck keypad@0ti,omap4-keypadsegment@20000simple-pm-bus``  00pptarget-module@0ti,sysc disabled target-module@2000ti,sysc disabled  target-module@6000ti,sysc disabledH`p (*0interconnect@4a000000ti,omap5-l4-cfgsimple-pm-bus /fckJJJ aplaia0TJJJJ J (J(0J0segment@0simple-pm-bush 00@@PP``pp  00 ``pp @@PP@@@PP``target-module@2000ti,sysc-omap4ti,sysc rev  scm@0ti,omap5-scm-coresimple-bus scm_conf@0syscon%pscm@800%ti,omap5-scm-padconf-coresimple-bus pinmux@40 ti,omap5-padconfpinctrl-single@default01pinmux_led_gpio_pinsp%0pinmux_i2c1_pins%upinmux_i2c2_pinsxz%xpinmux_mmc1_pins0%pinmux_mmc2_pinsP  %pinmux_mmc3_pins0dfhjln%pinmux_wlan_gpios_pins\^%pinmux_usbhost_pins0hv%1pinmux_dss_hdmi_pins%pinmux_lcd_pins2%pinmux_hdmi_conn_pins%pinmux_dss_dpi_pins%pinmux_mcspi1_pins %{omap5_padconf_global@5a0sysconsimple-bus %2pbias_regulator@60ti,pbias-omap5ti,pbias-omap`2pbias_mmc_omap5pbias_mmc_omap5w@2Z%target-module@4000ti,sysc-omap4ti,sysc@rev @cm_core_aon@0 ti,omap5-cm-core-aonsimple-bus  clockspad_clks_src_ck fixed-clockpad_clks_src_ck%3pad_clks_ck@108ti,gate-clock pad_clks_ck3o%Psecure_32k_clk_src_ck fixed-clocksecure_32k_clk_src_ckslimbus_src_clk fixed-clockslimbus_src_clk%4slimbus_clk@108ti,gate-clock slimbus_clk4o %Jsys_32k_ck fixed-clock sys_32k_ck%virt_12000000_ck fixed-clockvirt_12000000_ck%virt_13000000_ck fixed-clockvirt_13000000_ck]@%virt_16800000_ck fixed-clockvirt_16800000_ckY%virt_19200000_ck fixed-clockvirt_19200000_ck$%virt_26000000_ck fixed-clockvirt_26000000_ck%virt_27000000_ck fixed-clockvirt_27000000_ck%virt_38400000_ck fixed-clockvirt_38400000_ckI%xclk60mhsp1_ck fixed-clockxclk60mhsp1_ck%jxclk60mhsp2_ck fixed-clockxclk60mhsp2_ck%kdpll_abe_ck@1e0ti,omap4-dpll-m4xen-clock dpll_abe_ck56%7dpll_abe_x2_ckti,omap4-dpll-x2-clockdpll_abe_x2_ck7%8dpll_abe_m2x2_ck@1f0ti,divider-clockdpll_abe_m2x2_ck8|"%9abe_24m_fclkfixed-factor-clock abe_24m_fclk99D%Labe_clk@108ti,divider-clockabe_clk9|%Kabe_iclk@528ti,divider-clock abe_iclk:o( abe_lp_clk_divfixed-factor-clockabe_lp_clk_div99D%dpll_abe_m3x2_ck@1f4ti,divider-clockdpll_abe_m3x2_ck8|"%;dpll_core_byp_mux@12c ti,mux-clockdpll_core_byp_mux;o,%<dpll_core_ck@120ti,omap4-dpll-core-clock dpll_core_ck< $,(%=dpll_core_x2_ckti,omap4-dpll-x2-clockdpll_core_x2_ck=%>dpll_core_h21x2_ck@150ti,divider-clockdpll_core_h21x2_ck>|?P"%?c2c_fclkfixed-factor-clock c2c_fclk?9D%@c2c_iclkfixed-factor-clock c2c_iclk@9Ddpll_core_h11x2_ck@138ti,divider-clockdpll_core_h11x2_ck>|?8"dpll_core_h12x2_ck@13cti,divider-clockdpll_core_h12x2_ck>|?<"%Adpll_core_h13x2_ck@140ti,divider-clockdpll_core_h13x2_ck>|?@"dpll_core_h14x2_ck@144ti,divider-clockdpll_core_h14x2_ck>|?D"%adpll_core_h22x2_ck@154ti,divider-clockdpll_core_h22x2_ck>|?T"dpll_core_h23x2_ck@158ti,divider-clockdpll_core_h23x2_ck>|?X"dpll_core_h24x2_ck@15cti,divider-clockdpll_core_h24x2_ck>|?\"dpll_core_m2_ck@130ti,divider-clockdpll_core_m2_ck=|0"dpll_core_m3x2_ck@134ti,divider-clockdpll_core_m3x2_ck>|4"%iva_dpll_hs_clk_divfixed-factor-clockiva_dpll_hs_clk_divA9D%Bdpll_iva_byp_mux@1ac ti,mux-clockdpll_iva_byp_muxBo%Cdpll_iva_ck@1a0ti,omap4-dpll-clock dpll_iva_ckC[DEp}@%Ddpll_iva_x2_ckti,omap4-dpll-x2-clockdpll_iva_x2_ckD%Edpll_iva_h11x2_ck@1b8ti,divider-clockdpll_iva_h11x2_ckE|?"[F`%Fdpll_iva_h12x2_ck@1bcti,divider-clockdpll_iva_h12x2_ckE|?"[G$%Gmpu_dpll_hs_clk_divfixed-factor-clockmpu_dpll_hs_clk_divA9D%Hdpll_mpu_ck@160ti,omap5-mpu-dpll-clock dpll_mpu_ckH`dlh%dpll_mpu_m2_ck@170ti,divider-clockdpll_mpu_m2_ck|p"per_dpll_hs_clk_divfixed-factor-clockper_dpll_hs_clk_div;9D%Qusb_dpll_hs_clk_divfixed-factor-clockusb_dpll_hs_clk_div;9D%Wl3_iclk_div@100ti,divider-clock l3_iclk_div|oA%Igpu_l3_iclkfixed-factor-clock gpu_l3_iclkI9Dl4_root_clk_div@100ti,divider-clockl4_root_clk_div|oIslimbus1_slimbus_clk@560ti,gate-clockslimbus1_slimbus_clkJo `aess_fclk@528ti,divider-clock aess_fclkKo|(%:mcasp_sync_mux_ck@540 ti,mux-clockmcasp_sync_mux_ck LMNo@%Omcasp_gfclk@540 ti,mux-clock mcasp_gfclk OPJo@dummy_ck fixed-clock dummy_ckclockdomainsmpu_cm@300 ti,omap4-cmmpu_cm clk@20 ti,clkctrl mpu_clkctrl %dsp_cm@400 ti,omap4-cmdsp_cm clk@20 ti,clkctrl dsp_clkctrl %nabe_cm@500 ti,omap4-cmabe_cm clk@20 ti,clkctrl abe_clkctrl d%target-module@8000ti,sysc-omap4ti,syscrev  cm_core@0ti,omap5-cm-coresimple-bus   clocksdpll_per_byp_mux@14c ti,mux-clockdpll_per_byp_muxQoL%Rdpll_per_ck@140ti,omap4-dpll-clock dpll_per_ckR@DLH%Sdpll_per_x2_ckti,omap4-dpll-x2-clockdpll_per_x2_ckS%Tdpll_per_h11x2_ck@158ti,divider-clockdpll_per_h11x2_ckT|?X"%Zdpll_per_h12x2_ck@15cti,divider-clockdpll_per_h12x2_ckT|?\"dpll_per_h14x2_ck@164ti,divider-clockdpll_per_h14x2_ckT|?d"%bdpll_per_m2_ck@150ti,divider-clockdpll_per_m2_ckS|P"%\dpll_per_m2x2_ck@150ti,divider-clockdpll_per_m2x2_ckT|P"%[dpll_per_m3x2_ck@154ti,divider-clockdpll_per_m3x2_ckT|T"%dpll_unipro1_ck@200ti,omap4-dpll-clockdpll_unipro1_ck %Udpll_unipro1_clkdcoldofixed-factor-clockdpll_unipro1_clkdcoldoU9D%_dpll_unipro1_m2_ck@210ti,divider-clockdpll_unipro1_m2_ckU|"%`dpll_unipro2_ck@1c0ti,omap4-dpll-clockdpll_unipro2_ck%Vdpll_unipro2_clkdcoldofixed-factor-clockdpll_unipro2_clkdcoldoV9Ddpll_unipro2_m2_ck@1d0ti,divider-clockdpll_unipro2_m2_ckV|"dpll_usb_byp_mux@18c ti,mux-clockdpll_usb_byp_muxWo%Xdpll_usb_ck@180ti,omap4-dpll-j-type-clock dpll_usb_ckX%Ydpll_usb_clkdcoldofixed-factor-clockdpll_usb_clkdcoldoY9Ddpll_usb_m2_ck@190ti,divider-clockdpll_usb_m2_ckY|"%]func_128m_clkfixed-factor-clockfunc_128m_clkZ9Dfunc_12m_fclkfixed-factor-clockfunc_12m_fclk[9Dfunc_24m_clkfixed-factor-clock func_24m_clk\9D%Nfunc_48m_fclkfixed-factor-clockfunc_48m_fclk[9Dfunc_96m_fclkfixed-factor-clockfunc_96m_fclk[9D%^l3init_60m_fclk@104ti,divider-clockl3init_60m_fclk] %iiss_ctrlclk@1320ti,gate-clock iss_ctrlclk^o lli_txphy_clk@f20ti,gate-clocklli_txphy_clk_o lli_txphy_ls_clk@f20ti,gate-clocklli_txphy_ls_clk`o  usb_phy_cm_clk32k@640ti,gate-clockusb_phy_cm_clk32ko@%qfdif_fclk@1328ti,divider-clock fdif_fclkZo|(gpu_core_gclk_mux@1520 ti,mux-clockgpu_core_gclk_muxabo gpu_hyd_gclk_mux@1520 ti,mux-clockgpu_hyd_gclk_muxabo hsi_fclk@1638ti,divider-clock hsi_fclk[o|8clockdomainsl3init_clkdmti,clockdomain l3init_clkdmYl3main1_cm@700 ti,omap4-cm l3main1_cm clk@20 ti,clkctrll3main1_clkctrl % l3main2_cm@800 ti,omap4-cm l3main2_cm clk@20 ti,clkctrll3main2_clkctrl % ipu_cm@900 ti,omap4-cmipu_cm   clk@20 ti,clkctrl ipu_clkctrl %dma_cm@a00 ti,omap4-cmdma_cm   clk@20 ti,clkctrl dma_clkctrl %hemif_cm@b00 ti,omap4-cmemif_cm   clk@20 ti,clkctrl emif_clkctrl %l4cfg_cm@d00 ti,omap4-cm l4cfg_cm   clk@20 ti,clkctrll4cfg_clkctrl %/l3instr_cm@e00 ti,omap4-cm l3instr_cm clk@20 ti,clkctrll3instr_clkctrl % clock@1000 ti,omap4-cm l4per_cm clock@20 ti,clkctrll4per_clkctrl \%tclock@1a0 ti,clkctrll4sec_clkctrl<%ydss_cm@1400 ti,omap4-cmdss_cm clk@20 ti,clkctrl dss_clkctrl %gpu_cm@1500 ti,omap4-cmgpu_cm clk@20 ti,clkctrl gpu_clkctrl %l3init_cm@1600 ti,omap4-cm l3init_cm clk@20 ti,clkctrll3init_clkctrl %ctarget-module@20000ti,sysc-omap4ti,sysc revsysc. cfck omap_dwc3@0ti,dwc3 ]< FdMeusb@10000 snps,dwc3$\\]Yperipheralhostotgifgnusb2-phyusb3-phy xperipheraltarget-module@56000ti,sysc-omap2ti,sysc``,`(revsyscsyss# .  hfck `dma-controller@0ti,omap4430-sdmati,omap-sdma0   %ztarget-module@58000ti,sysc disabled0 0target-module@5e000ti,sysc disabled  target-module@62000ti,sysc-omap2ti,sysc   revsyscsyss  cHfck  usbhstll@0 ti,usbhs-tll Ntarget-module@64000ti,sysc-omap4ti,sysc@@ revsysc. c8fck @usbhshost@0ti,usbhs-host  ijk3refclk_60m_intrefclk_60m_ext_p1refclk_60m_ext_p2 ehci-hsic ehci-hsicohci@800ti,ohci-omap3 Lehci@c00 ti,ehci-omap  M ilmtarget-module@66000ti,sysc-omap2ti,sysc```revsyscsyss  nfckorstctrl `mmu@0ti,omap4-iommu %target-module@70000ti,sysc disabled @target-module@75000ti,sysc disabled Psegment@80000simple-pm-bus      @@PP``pp` `p p  @@@PP``pp @@ @P P` `p p  @@ @P P` `p p target-module@0ti,sysc-omap2ti,syscrevsyscsyss  cfck<@@@PP``ppocp2scp@0ti,omap-ocp2scp usb2phy@4000 ti,omap-usb2@|pqcwkupclkrefclk%fusb3phy@4400 ti,omap-usb3DHdL@phy_rxphy_txpll_ctrlppqcwkupclksysclkrefclk%gtarget-module@10000ti,sysc-omap2ti,syscrevsyscsyss  cfck<@@@PP``ppocp2scp@0ti,omap-ocp2scp phy@6000ti,phy-pipe3-sata`ddh@phy_rxphy_txpll_ctrlptchsysclkrefclk%starget-module@20000ti,sysc disabled<@@@PP``pptarget-module@36000ti,sysc disabled `target-module@4d000ti,sysc disabled target-module@59000ti,sysc disabled target-module@5b000ti,sysc disabled target-module@5d000ti,sysc disabled target-module@60000ti,sysc disabled target-module@74000ti,sysc-omap4ti,sysc@@ revsysc  /fck @mailbox@0ti,omap4-mailbox -%mbox-ipu ? J%mbox-dsp ? J%target-module@76000ti,sysc-omap2ti,sysc```revsyscsyss  /fck `spinlock@0ti,omap4-hwspinlockUsegment@100000simple-pm-bus`  00target-module@2000ti,sysc disabled  target-module@8000ti,sysc disabled target-module@a000ti,sysc disabled target-module@40000ti,sysc-omap4ti,sysc revsysc .r chfck sata@0snps,dwc-ahci 6is nsata-phy chcsegment@180000simple-pm-bussegment@200000simple-pm-bus!!  ` `p p@ @P P ! 0!0  !!`!`p!p@!@P!P!!""`"`p"p""""!!!!@"@P"P 0 0   " 0"0target-module@2000ti,sysc disabled  target-module@4000ti,sysc disabled @target-module@6000ti,sysc disabled `target-module@8000ti,sysc disabled target-module@a000ti,sysc disabled target-module@c000ti,sysc disabled target-module@10000ti,sysc disabled target-module@12000ti,sysc disabled  target-module@14000ti,sysc disabled @target-module@16000ti,sysc disabled `target-module@18000ti,sysc disabled target-module@1a000ti,sysc disabled target-module@1c000ti,sysc disabled target-module@1e000ti,sysc disabled target-module@20000ti,sysc disabled target-module@22000ti,sysc disabled  target-module@24000ti,sysc disabled @target-module@26000ti,sysc disabled `target-module@28000ti,sysc disabled target-module@2a000ti,sysc disabled segment@280000simple-pm-bussegment@300000simple-pm-businterconnect@48000000ti,omap5-l4-persimple-pm-bus tfck0HHHHHHaplaia0ia1ia2ia3H H segment@0simple-pm-bus  00@@PP``ppPP``pp  0000@@  0 0``pp          @ @ P P ` ` @   ``pp @ @ P P        P P ` `  0 0 P Ptarget-module@20000ti,sysc-omap2ti,syscPTXrevsyscsyss t0fck serial@0ti,omap4-uart Jltarget-module@32000ti,sysc-omap4-timerti,sysc   revsysc tfck  timer@0ti,omap5430-timertfcktimer_sys_ck &target-module@34000ti,sysc-omap4-timerti,sysc@@ revsysc t fck @timer@0ti,omap5430-timert fcktimer_sys_ck 'target-module@36000ti,sysc-omap4-timerti,sysc`` revsysc t(fck `timer@0ti,omap5430-timert(fcktimer_sys_ck (target-module@3e000ti,sysc-omap4-timerti,sysc revsysc t0fck timer@0ti,omap5430-timert0fcktimer_sys_ck -utarget-module@51000ti,sysc-omap2ti,syscrevsyscsysstt fckdbclk gpio@0ti,omap4-gpio #!%target-module@53000ti,sysc-omap2ti,sysc001revsyscsysstt fckdbclk 0gpio@0ti,omap4-gpio y!%target-module@55000ti,sysc-omap2ti,syscPPQrevsyscsysst@t@ fckdbclk Pgpio@0ti,omap4-gpio !target-module@57000ti,sysc-omap2ti,syscppqrevsyscsysstHtH fckdbclk pgpio@0ti,omap4-gpio !%target-module@59000ti,sysc-omap2ti,syscrevsyscsysstPtP fckdbclk gpio@0ti,omap4-gpio  !%target-module@5b000ti,sysc-omap2ti,syscrevsyscsysstXtX fckdbclk gpio@0ti,omap4-gpio !!target-module@5d000ti,sysc-omap2ti,syscrevsyscsysst`t` fckdbclk gpio@0ti,omap4-gpio "!target-module@60000ti,sysc-omap2ti,syscrevsyscsyss tfck i2c@0 ti,omap4-i2c =target-module@66000ti,sysc-omap2ti,sysc`P`T`Xrevsyscsyss tPfck `serial@0ti,omap4-uart iltarget-module@68000ti,sysc-omap2ti,syscPTXrevsyscsyss tXfck serial@0ti,omap4-uart jltarget-module@6a000ti,sysc-omap2ti,syscPTXrevsyscsyss t fck serial@0ti,omap4-uart Hltarget-module@6c000ti,sysc-omap2ti,syscPTXrevsyscsyss t(fck serial@0ti,omap4-uart Iltarget-module@6e000ti,sysc-omap2ti,syscPTXrevsyscsyss t8fck serial@0ti,omap4-uart Fltarget-module@70000ti,sysc-omap2ti,syscrevsyscsyss tfck i2c@0 ti,omap4-i2c 8defaultuat24@50 atmel,24c02Ppalmas@48 ti,palmasHvdefault %wpalmas_usbti,palmas-usb-vid%drtcti,palmas-rtc&wpalmas_pmicti,palmas-pmic&w Yshort-irqregulatorssmps123smps123 '`%smps45smps45 '0smps6smps6``smps7smps7w@w@smps8smps8 '0smps9smps92Z2Zsmps10_out2 smps10_out2LK@LK@smps10_out1 smps10_out1LK@LK@%eldo1ldo1w@w@ldo2ldo22Z2Z%%ldo3ldo3``ldo4ldo4w@w@%ldo5ldo5w@w@ldo6ldo6OOldo7ldo7 disabledldo8ldo8--ldo9ldo9w@-%ldolnldolnw@w@ldousbldousb1P1Pregen3regen3target-module@72000ti,sysc-omap2ti,sysc   revsyscsyss tfck  i2c@0 ti,omap4-i2c 9defaultx%target-module@78000ti,sysc disabled target-module@7a000ti,sysc-omap2ti,syscrevsyscsyss tfck i2c@0 ti,omap4-i2c >target-module@7c000ti,sysc-omap2ti,syscrevsyscsyss tHfck i2c@0 ti,omap4-i2c <target-module@86000ti,sysc-omap4-timerti,sysc`` revsysc tfck `timer@0ti,omap5430-timertfcktimer_sys_ck .utarget-module@88000ti,sysc-omap4-timerti,sysc revsysc tfck timer@0ti,omap5430-timertfcktimer_sys_ck /utarget-module@90000ti,sysc-omap2ti,sysc   revsysc y fck  rng@0 ti,omap4-rng  4target-module@98000ti,sysc-omap4ti,sysc   revsysc tfck  spi@0ti,omap4-mcspi A6@Dz#z$z%z&z'z(z)z* Itx0rx0tx1rx1tx2rx2tx3rx3target-module@9a000ti,sysc-omap4ti,sysc   revsysc tfck  spi@0ti,omap4-mcspi B6 Dz+z,z-z.Itx0rx0tx1rx1default{ads7846@0default| ti,ads7846S}^`&~ p~} target-module@9c000ti,sysc-omap4ti,sysc   revsysc. cfck  mmc@0ti,omap4-hsmmc S Dz=z>Itxrx#default0<target-module@a2000ti,sysc disabled  target-module@a4000ti,sysc disabled @ Ptarget-module@a5000ti,sysc-omap2ti,sysc P0 P4 P8revsyscsyss yfck  P disableddes@0 ti,omap4-des RDzuztItxrxtarget-module@a8000ti,sysc disabled  @target-module@ad000ti,sysc-omap4ti,sysc   revsysc. tfck  mmc@0ti,omap4-hsmmc ^ DzMzNItxrxdefault0<Ftarget-module@b2000ti,sysc disabled  target-module@b4000ti,sysc-omap4ti,sysc @ @ revsysc. cfck  @mmc@0ti,omap4-hsmmc V Dz/z0Itxrxdefault0<Ftarget-module@b8000ti,sysc-omap4ti,sysc   revsysc tfck  spi@0ti,omap4-mcspi [6DzzItx0rx0target-module@ba000ti,sysc-omap4ti,sysc   revsysc tfck  spi@0ti,omap4-mcspi 06DzFzGItx0rx0target-module@d1000ti,sysc-omap4ti,sysc   revsysc. tfck  mmc@0ti,omap4-hsmmc ` Dz9z:Itxrx disabledtarget-module@d5000ti,sysc-omap4ti,sysc P P revsysc. t@fck  Pmmc@0ti,omap4-hsmmc ; Dz;z<Itxrx disabledsegment@200000simple-pm-bustarget-module@48210000ti,sysc-omap4-simpleti,sysc fck H!mpu ti,omap4-mpuWinterconnect@40100000ti,omap5-l4-abesimple-pm-bus@@laap@IIsegment@0simple-pm-bus0  00@@PP``pp  00      IIIII I I0I0I@I@IPIPI`I`IpIpIIIIIIIIIIIIIIIII I I0I0IIIIIIIIIIIIIIIIIIIII I I I I I I I III I target-module@22000ti,sysc-omap2ti,sysc sysc  (fck I I mcbsp@0ti,omap4-mcbspI mpudma Ycommon\Dz!z"Itxrx disabledtarget-module@24000ti,sysc-omap2ti,sysc@sysc  0fck@I@I@mcbsp@0ti,omap4-mcbspI@mpudma Ycommon\DzzItxrx disabledtarget-module@26000ti,sysc-omap2ti,sysc`sysc  8fck`I`I`mcbsp@0ti,omap4-mcbspI`mpudma Ycommon\DzzItxrx disabledtarget-module@28000ti,sysc disabledIItarget-module@2a000ti,sysc disabledIItarget-module@2e000ti,sysc-omap4ti,sysc revsysc fckIIdmic@0ti,omap4-dmicImpudma rDzCIup_link disabledtarget-module@30000ti,sysc disabledIItarget-module@32000ti,sysc-omap4ti,sysc   revsysc fck I I  disabledmcpdm@0ti,omap4-mcpdmI mpudma pDzAzBIup_linkdn_linktarget-module@38000ti,sysc-omap4-timerti,sysc revsysc HfckIItimer@0ti,omap5430-timerIHMfcktimer_sys_ck )kutarget-module@3a000ti,sysc-omap4-timerti,sysc revsysc PfckIItimer@0ti,omap5430-timerIPMfcktimer_sys_ck *kutarget-module@3c000ti,sysc-omap4-timerti,sysc revsysc XfckIItimer@0ti,omap5430-timerIXMfcktimer_sys_ck +ktarget-module@3e000ti,sysc-omap4-timerti,sysc revsysc `fckIItimer@0ti,omap5430-timerI`Mfcktimer_sys_ck ,kutarget-module@80000ti,sysc disabledIItarget-module@a0000ti,sysc disabled I I target-module@c0000ti,sysc disabled I I target-module@f1000ti,sysc-omap4ti,sysc revsysc.  fckIItarget-module@50000000ti,sysc-omap2ti,syscPPPrevsyscsyss x fckPP@gpmc@50000000ti,omap4430-gpmcP DzIrxtxfck!target-module@55082000ti,sysc-omap2ti,syscU U U revsyscsyss  fckrstctrl U mmu@0ti,omap4-iommu d%dsp ti,omap5-dsp po nomap5-dsp-fw.xe64T disabledipu@55020000 ti,omap5-ipuUl2ram omap5-ipu-fw.xem4 disabledtarget-module@4e000000ti,sysc-omap2ti,syscNN revsysc  Ndmm@0 ti,omap5-dmm qtarget-module@4c000000ti,sysc-omap4-simpleti,syscLrev fckA Lemif@0 ti,emif-4d5 ntarget-module@4d000000ti,sysc-omap4-simpleti,syscMrev fckA Memif@0 ti,emif-4d5 otarget-module@4b501000ti,sysc-omap2ti,syscKPKPKPrevsyscsyss yfck KPaes@0 ti,omap4-aes UDzoznItxrxtarget-module@4b701000ti,sysc-omap2ti,syscKpKpKprevsyscsyss yfck Kpaes@0 ti,omap4-aes @DzrzqItxrxtarget-module@4b100000ti,sysc-omap3-shamti,syscKKKrevsyscsyss  y(fck Ksham@0ti,omap4-sham 3DzwIrxbandgap@4a0021e0 J! J#, J#,J#< ~ti,omap5430-bandgap.%target-module@56000000ti,sysc-omap4ti,syscVV revsysc .  fck Vtarget-module@58000000ti,sysc-omap2ti,syscXX revsyss0 fckhdmi_clksys_clktv_clk Xdss@0 ti,omap5-dssokay fck defaulttarget-module@1000ti,sysc-omap2ti,syscrevsyscsyss  . fck dispc@0ti,omap5-dispc  fcktarget-module@2000ti,sysc-omap2ti,sysc   revsyscsyss  fck  encoder@0ti,omap5-rfbi disabledIfckicktarget-module@4000ti,sysc-omap2ti,sysc@@@revsyscsyss  @encoder@0 ti,omap5-dsi@@protophypll 5 disabled  fcksys_clktarget-module@9000ti,sysc-omap2ti,syscrevsyscsyss  encoder@0 ti,omap5-dsi@@protophypll 7okay  fcksys_clkDtarget-module@40000ti,sysc-omap4ti,sysc revsysc  fckdss_clk encoder@0ti,omap5-hdmi wppllphycore eokay  fcksys_clkDzL Iaudio_txOdefaultportendpoint[ k%portendpoint@0[q%endpoint@1[q%regulator-abb-mpu ti,abb-v2abb_mpu|2 J|J`J!J3base-addressint-addressefuse-addressldo-address0,regulator-abb-mm ti,abb-v2abb_mm|2 J|J`J!J3base-addressint-addressefuse-addressldo-address0memory@80000000memoryfixed-regulator-mmcsdregulator-fixed vmmcsd_fixed2Z2Z%fixed-regulator-vwlan-pdnregulator-fixedvwlan_pdn_fixed2Z2Z x %%fixed-regulator-vwlanregulator-fixed vwlan_fixed2Z2Z x%%ads7846-regregulator-fixed ads7846-reg2Z2Z%}hsusb2_phyusb-nop-xceiv %lhsusb3_phyusb-nop-xceiv %mleds gpio-ledsled1 Heartbeat  heartbeat 4offdisplay!startek,startek-kd050cpanel-dpi lcddefault Bpanel-timing@ O  W _( l( x+       portendpoint[%connector0hdmi-connector hdmiadefault portendpoint[%encoder0 ti,tfp410portsport@0endpoint[%port@1endpoint[%connector1dvi-connector dvi  portendpoint[% #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2i2c3i2c4mmc0mmc1mmc2mmc3mmc4serial0serial1serial2serial3serial4serial5rproc0rproc1display0display1display2device_typeregoperating-pointsclocksclock-namesclock-latency#cooling-cellscpu0-supplyphandlepolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresistripcooling-deviceinterruptsinterrupt-controller#interrupt-cellspower-domainsrangesdma-rangesreg-namesti,sysc-sidle#clock-cellsclock-output-namesti,index-starts-at-oneclock-multclock-div#power-domain-cells#reset-cellsti,bit-shiftti,max-div#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsti,sysc-maskti,syss-maskti,gpio-always-ongpio-controller#gpio-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsstatuspinctrl-namespinctrl-0sysconregulator-nameregulator-min-microvoltregulator-max-microvoltclock-frequencyti,index-power-of-twoti,dividersassigned-clock-ratesti,sysc-midleutmi-modeextconvbus-supplyinterrupt-namesphysphy-namesdr_mode#dma-cellsdma-channelsdma-requestsport2-modeport3-moderemote-wakeup-connectedresetsreset-names#iommu-cellssyscon-phy-power#phy-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rx#hwlock-cellsports-implementedti,timer-pwmpagesizeti,system-power-controllerti,enable-vbus-detectionti,enable-id-detectionti,wakeupti,ldo6-vibratorregulator-always-onregulator-boot-onti,smps-rangestartup-delay-usti,spi-num-csdmasdma-namesvcc-supplyspi-max-frequencypendown-gpioti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,debounce-maxti,debounce-tolti,debounce-repwakeup-sourceti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplybus-widthti,non-removablesramti,buffer-sizeti,timer-dspti,no-idle-on-initgpmc,num-csgpmc,num-waitpinsti,iommu-bus-err-backti,bootregiommusfirmware-namemboxesphy-typehw-caps-read-idle-ctrlhw-caps-ll-interfacehw-caps-temp-alert#thermal-sensor-cellsvdd-supplyvdda-supplyremote-endpointlanesdata-linesti,settling-timeti,clock-cyclesti,tranxdone-status-maskti,ldovbb-override-maskti,ldovbb-vset-maskti,abb_infovin-supplyenable-active-highreset-gpioslabellinux,default-triggerdefault-stateenable-gpioshactivevactivehfront-porchhback-porchhsync-lenvback-porchvfront-porchvsync-lenhsync-activevsync-activede-activepixelclk-activehpd-gpiosdigitalddc-i2c-bus