gI8[( m[Hgumstix,omap4-duovero-parlorgumstix,omap4-duoveroti,omap4430ti,omap4 +#7OMAP4430 Gumstix Duovero on ParlorchosenB=/ocp/interconnect@48000000/segment@0/target-module@20000/serial@0aliases?I/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0?N/ocp/interconnect@48000000/segment@0/target-module@72000/i2c@0?S/ocp/interconnect@48000000/segment@0/target-module@60000/i2c@0EX/ocp/interconnect@48000000/segment@200000/target-module@150000/i2c@0?]/ocp/interconnect@48000000/segment@0/target-module@9c000/mmc@0?b/ocp/interconnect@48000000/segment@0/target-module@b4000/mmc@0?g/ocp/interconnect@48000000/segment@0/target-module@ad000/mmc@0?l/ocp/interconnect@48000000/segment@0/target-module@d1000/mmc@0?q/ocp/interconnect@48000000/segment@0/target-module@d5000/mmc@0Bv/ocp/interconnect@48000000/segment@0/target-module@6a000/serial@0B~/ocp/interconnect@48000000/segment@0/target-module@6c000/serial@0B/ocp/interconnect@48000000/segment@0/target-module@20000/serial@0B/ocp/interconnect@48000000/segment@0/target-module@6e000/serial@0 /ocp/dsp/ocp/ipu@55020000 /connectorcpus+cpu@0arm,cortex-a9cpucpu  'O 5acpu@1arm,cortex-a9cpusram@40304000 mmio-sram@0@interrupt-controller@48241000arm,cortex-a9-gic,H$H$ cache-controller@48242000arm,pl310-cacheH$ =Klocal-timer@48240600arm,cortex-a9-twd-timerH$  W  interrupt-controller@48281000ti,omap4-wugen-mpu,H( ocpsimple-pm-busb$ +pl3-noc@44000000ti,omap4-l3-nocDD EW  interconnect@4a300000ti,omap4-l4-wkupsimple-pm-busb  fckJ0J0J0 waplaia0+$pJ0J1J2segment@0simple-pm-bus+p`` @@PPtarget-module@4000ti,sysc-omap2ti,sysc@@ wrevsysc 0fck+ p@counter@0ti,omap-counter32k target-module@6000ti,sysc-omap4ti,sysc`wrev+ p` prm@0ti,omap4-prmsimple-bus  W + p clocks+sys_clkin_ck@110 ti,mux-clock sys_clkin_ck abe_dpll_bypass_clk_mux_ck@108 ti,mux-clockabe_dpll_bypass_clk_mux_ck9abe_dpll_refclk_mux_ck@10c ti,mux-clockabe_dpll_refclk_mux_ck 8dbgclk_mux_ckfixed-factor-clockdbgclk_mux_ckl4_wkup_clk_mux_ck@108 ti,mux-clockl4_wkup_clk_mux_cksyc_clk_div_ck@100ti,divider-clocksyc_clk_div_ckusim_ck@1858ti,divider-clockusim_ckXusim_fclk@1858ti,gate-clock usim_fclkXtrace_clk_div_ckti,clkdm-gate-clocktrace_clk_div_ck bandgap_fclk@1888ti,gate-clock bandgap_fclkclockdomainsemu_sys_clkdmti,clockdomainemu_sys_clkdml4_wkup_cm@1800 ti,omap4-cm l4_wkup_cm+ pclk@20 ti,clkctrll4_wkup_clkctrl \ emu_sys_cm@1a00 ti,omap4-cm emu_sys_cm+ pclk@20 ti,clkctrlemu_sys_clkctrl prm@300#ti,omap4-prm-instti,omap-prm-instprm@400#ti,omap4-prm-instti,omap-prm-instdprm@500#ti,omap4-prm-instti,omap-prm-instprm@600#ti,omap4-prm-instti,omap-prm-instprm@700#ti,omap4-prm-instti,omap-prm-inst4prm@f00#ti,omap4-prm-instti,omap-prm-instprm@1000#ti,omap4-prm-instti,omap-prm-instprm@1100#ti,omap4-prm-instti,omap-prm-inst@prm@1200#ti,omap4-prm-instti,omap-prm-instprm@1300#ti,omap4-prm-instti,omap-prm-instprm@1400#ti,omap4-prm-instti,omap-prm-instprm@1600#ti,omap4-prm-instti,omap-prm-instprm@1700#ti,omap4-prm-instti,omap-prm-inst prm@1900#ti,omap4-prm-instti,omap-prm-instprm@1b00#ti,omap4-prm-instti,omap-prm-inst@target-module@a000ti,sysc-omap4ti,syscwrev+ pscrm@0ti,omap4-scrm clocks+auxclk0_src_gate_ck@310 ti,composite-no-wait-gate-clockauxclk0_src_gate_ckauxclk0_src_mux_ck@310ti,composite-mux-clockauxclk0_src_mux_ck auxclk0_src_ckti,composite-clockauxclk0_src_ckauxclk0_ck@310ti,divider-clock auxclk0_ck.auxclk1_src_gate_ck@314 ti,composite-no-wait-gate-clockauxclk1_src_gate_ckauxclk1_src_mux_ck@314ti,composite-mux-clockauxclk1_src_mux_ck  auxclk1_src_ckti,composite-clockauxclk1_src_ck !auxclk1_ck@314ti,divider-clock auxclk1_ck!/auxclk2_src_gate_ck@318 ti,composite-no-wait-gate-clockauxclk2_src_gate_ck"auxclk2_src_mux_ck@318ti,composite-mux-clockauxclk2_src_mux_ck #auxclk2_src_ckti,composite-clockauxclk2_src_ck"#$auxclk2_ck@318ti,divider-clock auxclk2_ck$0auxclk3_src_gate_ck@31c ti,composite-no-wait-gate-clockauxclk3_src_gate_ck%auxclk3_src_mux_ck@31cti,composite-mux-clockauxclk3_src_mux_ck &auxclk3_src_ckti,composite-clockauxclk3_src_ck%&'auxclk3_ck@31cti,divider-clock auxclk3_ck'1auxclk4_src_gate_ck@320 ti,composite-no-wait-gate-clockauxclk4_src_gate_ck (auxclk4_src_mux_ck@320ti,composite-mux-clockauxclk4_src_mux_ck  )auxclk4_src_ckti,composite-clockauxclk4_src_ck()*auxclk4_ck@320ti,divider-clock auxclk4_ck* 2auxclk5_src_gate_ck@324 ti,composite-no-wait-gate-clockauxclk5_src_gate_ck$+auxclk5_src_mux_ck@324ti,composite-mux-clockauxclk5_src_mux_ck $,auxclk5_src_ckti,composite-clockauxclk5_src_ck+,-auxclk5_ck@324ti,divider-clock auxclk5_ck-$3auxclkreq0_ck@210 ti,mux-clockauxclkreq0_ck./0123auxclkreq1_ck@214 ti,mux-clockauxclkreq1_ck./0123auxclkreq2_ck@218 ti,mux-clockauxclkreq2_ck./0123auxclkreq3_ck@21c ti,mux-clockauxclkreq3_ck./0123auxclkreq4_ck@220 ti,mux-clockauxclkreq4_ck./0123 auxclkreq5_ck@224 ti,mux-clockauxclkreq5_ck./0123$clockdomainstarget-module@c000ti,sysc-omap4ti,sysc wrevsysc+ pscm@c000ti,omap4-scm-wkupsegment@10000simple-pm-bus+xp@@PPtarget-module@0ti,sysc-omap2ti,syscwrevsyscsyss -   fckdbclk+ pgpio@0ti,omap4-gpio W:L\,target-module@4000ti,sysc-omap2ti,sysc@@@wrevsyscsyss "- fck+ p@wdt@0ti,omap4-wdtti,omap3-wdt WPtarget-module@8000ti,sysc-omap2-timerti,syscwrevsyscsyss ' - fck+ ph|timer@0ti,omap3430-timer fcktimer_sys_ck W%  target-module@c000ti,sysc-omap2ti,syscwrevsyscsyss ' - Xfck+ pkeypad@0ti,omap4-keypad Wxwmputarget-module@e000ti,sysc-omap4ti,sysc wrevsysc+ ppinmux@40 ti,omap4-padconfpinctrl-single@8+,pinmux_twl6030_wkup_pinsusegment@20000simple-pm-bus+p``  00@@PPpptarget-module@0ti,sysc disabled+ ptarget-module@2000ti,sysc disabled+ p target-module@4000ti,sysc disabled+ p@target-module@6000ti,sysc disabled+0p`p 0interconnect@4a000000ti,omap4-l4-cfgsimple-pm-busb4 5fckJJJ waplaia0+TpJJJJ J (J(0J0segment@0simple-pm-bus+p 00@@PP``pp@  00 ``pp @@PPtarget-module@2000ti,sysc-omap4ti,sysc   wrevsysc+ p scm@0ti,omap4-scm-coresimple-bus+ pscm_conf@0syscon+control-phy@300ti,control-phy-usb2wpowergcontrol-phy@33cti,control-phy-otghs<wotghs_controlftarget-module@4000ti,sysc-omap4ti,sysc@wrev+ p@cm1@0ti,omap4-cm1simple-bus + p clocks+extalt_clkin_ck fixed-clockextalt_clkin_ck"Dpad_clks_src_ck fixed-clockpad_clks_src_ck"6pad_clks_ck@108ti,gate-clock pad_clks_ck6pad_slimbus_core_clks_ck fixed-clockpad_slimbus_core_clks_ck"secure_32k_clk_src_ck fixed-clocksecure_32k_clk_src_ck"slimbus_src_clk fixed-clockslimbus_src_clk"7slimbus_clk@108ti,gate-clock slimbus_clk7 sys_32k_ck fixed-clock sys_32k_ck"virt_12000000_ck fixed-clockvirt_12000000_ck" virt_13000000_ck fixed-clockvirt_13000000_ck"]@ virt_16800000_ck fixed-clockvirt_16800000_ck"Yvirt_19200000_ck fixed-clockvirt_19200000_ck"$virt_26000000_ck fixed-clockvirt_26000000_ck"virt_27000000_ck fixed-clockvirt_27000000_ck"virt_38400000_ck fixed-clockvirt_38400000_ck"Itie_low_clock_ck fixed-clocktie_low_clock_ck"utmi_phy_clkout_ck fixed-clockutmi_phy_clkout_ck"xclk60mhsp1_ck fixed-clockxclk60mhsp1_ck"`xclk60mhsp2_ck fixed-clockxclk60mhsp2_ck"axclk60motg_ck fixed-clockxclk60motg_ck"dpll_abe_ck@1e0ti,omap4-dpll-m4xen-clock dpll_abe_ck89:dpll_abe_x2_ck@1f0ti,omap4-dpll-x2-clockdpll_abe_x2_ck:;dpll_abe_m2x2_ck@1f0ti,divider-clockdpll_abe_m2x2_ck;2D<abe_24m_fclkfixed-factor-clock abe_24m_fclk<abe_clk@108ti,divider-clockabe_clk<[dpll_abe_m3x2_ck@1f4ti,divider-clockdpll_abe_m3x2_ck;2D=core_hsd_byp_clk_mux_ck@12c ti,mux-clockcore_hsd_byp_clk_mux_ck=,>dpll_core_ck@120ti,omap4-dpll-core-clock dpll_core_ck> $,(?dpll_core_x2_ckti,omap4-dpll-x2-clockdpll_core_x2_ck?@dpll_core_m6x2_ck@140ti,divider-clockdpll_core_m6x2_ck@2@Ddpll_core_m2_ck@130ti,divider-clockdpll_core_m2_ck?20DAddrphy_ckfixed-factor-clock ddrphy_ckAdpll_core_m5x2_ck@13cti,divider-clockdpll_core_m5x2_ck@2<DBdiv_core_ck@100ti,divider-clock div_core_ckBMdiv_iva_hs_clk@1dcti,divider-clockdiv_iva_hs_clkB[Fdiv_mpu_hs_clk@19cti,divider-clockdiv_mpu_hs_clkB[Ldpll_core_m4x2_ck@138ti,divider-clockdpll_core_m4x2_ck@28DCdll_clk_div_ckfixed-factor-clockdll_clk_div_ckCdpll_abe_m2_ck@1f0ti,divider-clockdpll_abe_m2_ck:Pdpll_core_m3x2_gate_ck@134 ti,composite-no-wait-gate-clockdpll_core_m3x2_gate_ck@4Ddpll_core_m3x2_div_ck@134ti,composite-divider-clockdpll_core_m3x2_div_ck@4Edpll_core_m3x2_ckti,composite-clockdpll_core_m3x2_ckDEdpll_core_m7x2_ck@144ti,divider-clockdpll_core_m7x2_ck@2DDiva_hsd_byp_clk_mux_ck@1ac ti,mux-clockiva_hsd_byp_clk_mux_ckFGdpll_iva_ck@1a0ti,omap4-dpll-clock dpll_iva_ckGHq7Hdpll_iva_x2_ckti,omap4-dpll-x2-clockdpll_iva_x2_ckHIdpll_iva_m4x2_ck@1b8ti,divider-clockdpll_iva_m4x2_ckI2DJq~Jdpll_iva_m5x2_ck@1bcti,divider-clockdpll_iva_m5x2_ckI2DKq] Kdpll_mpu_ck@160ti,omap4-dpll-clock dpll_mpu_ckL`dlhdpll_mpu_m2_ck@170ti,divider-clockdpll_mpu_m2_ck2pDper_hs_clk_div_ckfixed-factor-clockper_hs_clk_div_ck=Qusb_hs_clk_div_ckfixed-factor-clockusb_hs_clk_div_ck=Wl3_div_ck@100ti,divider-clock l3_div_ckMNl4_div_ck@100ti,divider-clock l4_div_ckNlp_clk_div_ckfixed-factor-clocklp_clk_div_ck<mpu_periphclkfixed-factor-clockmpu_periphclkocp_abe_iclk@528ti,divider-clock ocp_abe_iclk O(per_abe_24m_fclkfixed-factor-clockper_abe_24m_fclkPdummy_ck fixed-clock dummy_ck"clockdomainsmpuss_cm@300 ti,omap4-cm mpuss_cm+ pclk@20 ti,clkctrlmpuss_clkctrl tesla_cm@400 ti,omap4-cm tesla_cm+ pclk@20 ti,clkctrltesla_clkctrl cabe_cm@500 ti,omap4-cmabe_cm+ pclk@20 ti,clkctrl abe_clkctrl lOtarget-module@8000ti,sysc-omap4ti,syscwrev+ p cm2@0ti,omap4-cm2simple-bus + p clocks+per_hsd_byp_clk_mux_ck@14c ti,mux-clockper_hsd_byp_clk_mux_ckQLRdpll_per_ck@140ti,omap4-dpll-clock dpll_per_ckR@DLHSdpll_per_m2_ck@150ti,divider-clockdpll_per_m2_ckSP[dpll_per_x2_ck@150ti,omap4-dpll-x2-clockdpll_per_x2_ckSPTdpll_per_m2x2_ck@150ti,divider-clockdpll_per_m2x2_ckT2PDZdpll_per_m3x2_gate_ck@154 ti,composite-no-wait-gate-clockdpll_per_m3x2_gate_ckTTUdpll_per_m3x2_div_ck@154ti,composite-divider-clockdpll_per_m3x2_div_ckTTVdpll_per_m3x2_ckti,composite-clockdpll_per_m3x2_ckUVdpll_per_m4x2_ck@158ti,divider-clockdpll_per_m4x2_ckT2XDdpll_per_m5x2_ck@15cti,divider-clockdpll_per_m5x2_ckT2\Ddpll_per_m6x2_ck@160ti,divider-clockdpll_per_m6x2_ckT2`DYdpll_per_m7x2_ck@164ti,divider-clockdpll_per_m7x2_ckT2dDdpll_usb_ck@180ti,omap4-dpll-j-type-clock dpll_usb_ckWXdpll_usb_clkdcoldo_ck@1b4ti,fixed-factor-clockdpll_usb_clkdcoldo_ckX2Ddpll_usb_m2_ck@190ti,divider-clockdpll_usb_m2_ckX2D\ducati_clk_mux_ck@100 ti,mux-clockducati_clk_mux_ckMYfunc_12m_fclkfixed-factor-clockfunc_12m_fclkZfunc_24m_clkfixed-factor-clock func_24m_clk[func_24mc_fclkfixed-factor-clockfunc_24mc_fclkZfunc_48m_fclk@108ti,divider-clockfunc_48m_fclkZfunc_48mc_fclkfixed-factor-clockfunc_48mc_fclkZfunc_64m_fclk@108ti,divider-clockfunc_64m_fclkfunc_96m_fclk@108ti,divider-clockfunc_96m_fclkZinit_60m_fclk@104ti,divider-clockinit_60m_fclk\_per_abe_nc_fclk@108ti,divider-clockper_abe_nc_fclkPusb_phy_cm_clk32k@640ti,gate-clockusb_phy_cm_clk32k@hclockdomainsl3_init_clkdmti,clockdomainl3_init_clkdmXl4_ao_cm@600 ti,omap4-cm l4_ao_cm+ pclk@20 ti,clkctrll4_ao_clkctrl jl3_1_cm@700 ti,omap4-cml3_1_cm+ pclk@20 ti,clkctrl l3_1_clkctrl l3_2_cm@800 ti,omap4-cml3_2_cm+ pclk@20 ti,clkctrl l3_2_clkctrl ducati_cm@900 ti,omap4-cm ducati_cm + p clk@20 ti,clkctrlducati_clkctrl l3_dma_cm@a00 ti,omap4-cm l3_dma_cm + p clk@20 ti,clkctrll3_dma_clkctrl ]l3_emif_cm@b00 ti,omap4-cm l3_emif_cm + p clk@20 ti,clkctrll3_emif_clkctrl d2d_cm@c00 ti,omap4-cmd2d_cm + p clk@20 ti,clkctrl d2d_clkctrl il4_cfg_cm@d00 ti,omap4-cm l4_cfg_cm + p clk@20 ti,clkctrll4_cfg_clkctrl 5l3_instr_cm@e00 ti,omap4-cm l3_instr_cm+ pclk@20 ti,clkctrll3_instr_clkctrl $ ivahd_cm@f00 ti,omap4-cm ivahd_cm+ pclk@20 ti,clkctrlivahd_clkctrl iss_cm@1000 ti,omap4-cmiss_cm+ pclk@20 ti,clkctrl iss_clkctrl ol3_dss_cm@1100 ti,omap4-cm l3_dss_cm+ pclk@20 ti,clkctrll3_dss_clkctrl l3_gfx_cm@1200 ti,omap4-cm l3_gfx_cm+ pclk@20 ti,clkctrll3_gfx_clkctrl l3_init_cm@1300 ti,omap4-cm l3_init_cm+ pclk@20 ti,clkctrll3_init_clkctrl ^clock@1400 ti,omap4-cm l4_per_cm+ pclock@20 ti,clkctrll4_per_clkctrl Dpclock@1a0 ti,clkctrll4_secure_clkctrl<{target-module@56000ti,sysc-omap2ti,sysc``,`(wrevsyscsyss #  - ]fck+ p`dma-controller@0ti,omap4430-sdmati,omap-sdma0W   |target-module@58000ti,sysc-omap2ti,syscwrevsyscsyss #- ^fck+ pPhsi@0 ti,omap4-hsi@Pwsysgdd ^hsi_fck WGgdd_mpu+ p@hsi-port@2000ti,omap4-hsi-port (wtxrx WChsi-port@3000ti,omap4-hsi-port08wtxrx WDtarget-module@5e000ti,sysc disabled+ p target-module@62000ti,sysc-omap2ti,sysc   wrevsyscsyss   ^Hfck+ p usbhstll@0 ti,usbhs-tll WNtarget-module@64000ti,sysc-omap4ti,sysc@@@wrevsyscsyss  ^8fck+ p@usbhshost@0ti,usbhs-host+ p _`a3refclk_60m_intrefclk_60m_ext_p1refclk_60m_ext_p2 ehci-phyohci@800ti,ohci-omap3 WLehci@c00 ti,ehci-omap  WMbtarget-module@66000ti,sysc-omap2ti,sysc```wrevsyscsyss   cfckbd drstctrl+ p`mmu@0ti,omap4-iommu Wsegment@80000simple-pm-bus+p      @@PP``pp` `p p        target-module@29000ti,sysc disabled+ ptarget-module@2b000ti,sysc-omap2ti,syscwrevsyscsyss  - ^@fck+ pusb_otg_hs@0ti,omap4-musbW\]mcdma,ee 4usb2-phy>IQ Zffu2target-module@2d000ti,sysc-omap2ti,syscwrevsyscsyss  - ^fck+ pocp2scp@0ti,omap-ocp2scp+ pusb2phy@80 ti,omap-usb2XZghwkupclk{etarget-module@36000ti,sysc-omap2ti,sysc```wrevsyscsyss - ifck+ p`target-module@4d000ti,sysc-omap2ti,syscwrevsyscsyss - ifck+ ptarget-module@59000ti,sysc-omap4-srti,sysc8wsysc  jfck+ psmartreflex@0ti,omap4-smartreflex-mpu Wtarget-module@5b000ti,sysc-omap4-srti,sysc8wsysc  jfck+ psmartreflex@0ti,omap4-smartreflex-iva Wftarget-module@5d000ti,sysc-omap4-srti,sysc8wsysc  jfck+ psmartreflex@0ti,omap4-smartreflex-core Wtarget-module@60000ti,sysc disabled+ ptarget-module@74000ti,sysc-omap4ti,sysc@@ wrevsysc   5fck+ p@mailbox@0ti,omap4-mailbox Wmbox-ipu  mbox-dsp  target-module@76000ti,sysc-omap2ti,sysc```wrevsyscsyss  - 5fck+ p`spinlock@0ti,omap4-hwspinlocksegment@100000simple-pm-bus+`p  00target-module@0ti,sysc-omap4ti,sysc wrevsysc+ ppinmux@40 ti,omap4-padconfpinctrl-single@+,default klmqpinmux_mcpdm_pins(pinmux_twl6040_pins&`pinmux_mcbsp1_pins pinmux_hsusbb1_pins`           pinmux_hsusb1phy_pinsLpinmux_w2cbw0015_pins&:pinmux_i2c1_pinsspinmux_i2c4_pinspinmux_mmc1_pins0~pinmux_mmc5_pins0  pinmux_twl6030_pins^Atpinmux_led_pinskpinmux_button_pinslpinmux_i2c2_pinszpinmux_i2c3_pinsrpinmux_smsc_pins(*0mpinmux_dss_hdmi_pins XZ\^omap4_padconf_global@5a0sysconsimple-busp+ ppnpbias_regulator@60ti,pbias-omap4ti,pbias-omap`npbias_mmc_omap4pbias_mmc_omap4w@ -}target-module@2000ti,sysc disabled+ p target-module@8000ti,sysc disabled+ ptarget-module@a000ti,sysc-omap4ti,sysc wrevsysc   8 ofck+ psegment@180000simple-pm-bus+segment@200000simple-pm-bus+hp!!  @ @P P` `p p ! 0!0  !!`!`p!p@!@P!P!!""`"`p"p""""!!target-module@4000ti,sysc disabled+ p@target-module@6000ti,sysc disabled+ p`target-module@a000ti,sysc disabled+ ptarget-module@c000ti,sysc disabled+ ptarget-module@10000ti,sysc disabled+ ptarget-module@12000ti,sysc disabled+ p target-module@14000ti,sysc disabled+ p@target-module@16000ti,sysc disabled+ p`target-module@18000ti,sysc disabled+ ptarget-module@1c000ti,sysc disabled+ ptarget-module@1e000ti,sysc disabled+ ptarget-module@20000ti,sysc disabled+ ptarget-module@26000ti,sysc disabled+ p`target-module@28000ti,sysc disabled+ ptarget-module@2a000ti,sysc disabled+ psegment@280000simple-pm-bus+segment@300000simple-pm-bus+p042@@2@ `2`p2p2232 2@target-module@0ti,sysc disabled+xp@@@ ``pp @interconnect@48000000ti,omap4-l4-persimple-pm-busb pfck0HHHHHHwaplaia0ia1ia2ia3+pH H segment@0simple-pm-bus+p  00@@PP``ppPP``pp  00 ` ` p p``pp``pp             @ @ ` ` @     0 0 @ @ P P        P P ` `  0 0 P Ptarget-module@20000ti,sysc-omap2ti,syscPTXwrevsyscsyss - p0fck+ pserial@0ti,omap4-uart WJ"lIJqtarget-module@32000ti,sysc-omap2-timerti,sysc   wrevsyscsyss ' - pfck+ p timer@0ti,omap3430-timerpfcktimer_sys_ck W&target-module@34000ti,sysc-omap4-timerti,sysc@@ wrevsysc  p fck+ p@timer@0ti,omap4430-timerp fcktimer_sys_ck W'target-module@36000ti,sysc-omap4-timerti,sysc`` wrevsysc  p(fck+ p`timer@0ti,omap4430-timerp(fcktimer_sys_ck W(target-module@3e000ti,sysc-omap4-timerti,sysc wrevsysc  p0fck+ ptimer@0ti,omap4430-timerp0fcktimer_sys_ck W-]target-module@40000ti,sysc disabled+ ptarget-module@55000ti,sysc-omap2ti,syscPPQwrevsyscsyss -p@p@ fckdbclk+ pPgpio@0ti,omap4-gpio WL\,target-module@57000ti,sysc-omap2ti,syscppqwrevsyscsyss -pHpH fckdbclk+ ppgpio@0ti,omap4-gpio WL\,target-module@59000ti,sysc-omap2ti,syscwrevsyscsyss -pPpP fckdbclk+ pgpio@0ti,omap4-gpio W L\,target-module@5b000ti,sysc-omap2ti,syscwrevsyscsyss -pXpX fckdbclk+ pgpio@0ti,omap4-gpio W!L\,target-module@5d000ti,sysc-omap2ti,syscwrevsyscsyss -p`p` fckdbclk+ pgpio@0ti,omap4-gpio W"L\,wtarget-module@60000ti,sysc-omap2ti,syscwrevsyscsyss - pfck+ pi2c@0 ti,omap4-i2c W=+defaultr"eeprom@51 atmel,24c01Qjtarget-module@6a000ti,sysc-omap2ti,syscPTXwrevsyscsyss - p fck+ pserial@0ti,omap4-uart WH"ltarget-module@6c000ti,sysc-omap2ti,syscPTXwrevsyscsyss - p(fck+ pserial@0ti,omap4-uart WI"ltarget-module@6e000ti,sysc-omap2ti,syscPTXwrevsyscsyss - p8fck+ pserial@0ti,omap4-uart WF"ltarget-module@70000ti,sysc-omap2ti,syscwrevsyscsyss - pfck+ pi2c@0 ti,omap4-i2c W8+defaults"twl@48H W ti,twl6030,defaultturtcti,twl4030-rtcW regulator-vaux1ti,twl6030-vaux1B@ -regulator-vaux2ti,twl6030-vaux2O *regulator-vaux3ti,twl6030-vaux3B@ -regulator-vmmcti,twl6030-vmmcO -regulator-vppti,twl6030-vppw@ &%regulator-vusimti,twl6030-vusimO ,@ regulator-vdacti,twl6030-vdacregulator-vanati,twl6030-vanaregulator-vcxioti,twl6030-vcxiosregulator-vusbti,twl6030-vusbvregulator-v1v8ti,twl6030-v1v8sxregulator-v2v1ti,twl6030-v2v1syusb-comparatorti,twl6030-usbW vpwmti,twl6030-pwmpwmledti,twl6030-pwmledgpadcti,twl6030-gpadcWtwl@4b ti,twl6040K Ww wxytarget-module@72000ti,sysc-omap2ti,sysc   wrevsyscsyss - pfck+ p i2c@0 ti,omap4-i2c W9+defaultz"target-module@76000ti,sysc-omap4ti,sysc`` wrevsysc  pfck+ p`target-module@78000ti,sysc-omap2ti,syscwrevsyscsyss  - p8fck+ pelm@0ti,am3352-elm  W disabledtarget-module@86000ti,sysc-omap2-timerti,sysc```wrevsyscsyss ' - pfck+ p`timer@0ti,omap3430-timerpfcktimer_sys_ck W.]target-module@88000ti,sysc-omap4-timerti,sysc wrevsysc  pfck+ ptimer@0ti,omap4430-timerpfcktimer_sys_ck W/]target-module@90000ti,sysc-omap2ti,sysc   wrevsysc  { fck+ p rng@0 ti,omap4-rng  W4target-module@96000ti,sysc-omap2ti,sysc `wsysc   pfck+ p `mcbsp@0ti,omap4-mcbspwmpu Wcommon|| txrx disabledtarget-module@98000ti,sysc-omap4ti,sysc   wrevsysc  pfck+ p spi@0ti,omap4-mcspi WA+@|#|$|%|&|'|(|)|* tx0rx0tx1rx1tx2rx2tx3rx3target-module@9a000ti,sysc-omap4ti,sysc   wrevsysc  pfck+ p spi@0ti,omap4-mcspi WB+ |+|,|-|.tx0rx0tx1rx1target-module@9c000ti,sysc-omap4ti,sysc   wrevsysc  ^fck+ p mmc@0ti,omap4-hsmmc WS#|=|>txrx:}default~GS`target-module@9e000ti,sysc disabled+ p target-module@a2000ti,sysc disabled+ p target-module@a4000ti,sysc disabled+p @ Ptarget-module@a5000ti,sysc-omap2ti,sysc P0 P4 P8wrevsyscsyss - {fck+ p Pdes@0 ti,omap4-des WR|u|ttxrxtarget-module@a8000ti,sysc disabled+ p @target-module@ad000ti,sysc-omap4ti,sysc   wrevsysc  pfck+ p mmc@0ti,omap4-hsmmc W^#|M|Ntxrx disabledtarget-module@b0000ti,sysc disabled+ p target-module@b2000ti,sysc-omap2ti,sysc   wrevsyscsyss -h phfck+ p 1w@0 ti,omap3-1w W:target-module@b4000ti,sysc-omap4ti,sysc @ @ wrevsysc  ^fck+ p @mmc@0ti,omap4-hsmmc WV#|/|0txrx disabledtarget-module@b8000ti,sysc-omap4ti,sysc   wrevsysc  pfck+ p spi@0ti,omap4-mcspi W[+||tx0rx0target-module@ba000ti,sysc-omap4ti,sysc   wrevsysc  pfck+ p spi@0ti,omap4-mcspi W0+|F|Gtx0rx0target-module@d1000ti,sysc-omap4ti,sysc   wrevsysc  pfck+ p mmc@0ti,omap4-hsmmc W`#|9|:txrx disabledtarget-module@d5000ti,sysc-omap4ti,sysc P P wrevsysc  p@fck+ p Pmmc@0ti,omap4-hsmmc W;#|;|<txrxdefaultGS`qsegment@200000simple-pm-bus+p55target-module@150000ti,sysc-omap2ti,syscwrevsyscsyss - pfck+ pi2c@0 ti,omap4-i2c W>+default"target-module@48210000ti,sysc-omap4-simpleti,syscb fck+ pH!mpu ti,omap4-mpuinterconnect@40100000ti,omap4-l4-abesimple-pm-bus@@wlaapb+p@IIsegment@0simple-pm-bus+0p  00@@PP``pp  00      IIIII I I0I0I@I@IPIPI`I`IpIpIIIIIIIIIIIIIIIII I I0I0IIIIIIIIIIIIIIIIIIIII I I I I I I I III I target-module@22000ti,sysc-omap2ti,sysc wsysc   O(fck+p I I mcbsp@0ti,omap4-mcbspI wmpudma Wcommon|!|"txrxokaydefaulttarget-module@24000ti,sysc-omap2ti,sysc@wsysc   O0fck+p@I@I@mcbsp@0ti,omap4-mcbspI@wmpudma Wcommon||txrx disabledtarget-module@26000ti,sysc-omap2ti,sysc`wsysc   O8fck+p`I`I`mcbsp@0ti,omap4-mcbspI`wmpudma Wcommon||txrx disabledtarget-module@28000ti,sysc-mcaspti,sysc wrevsysc  O fck+0pII IImcasp@0ti,omap4-mcasp-audio Iwmpudat Wmtx|tx O fck disabledtarget-module@2e000ti,sysc-omap4ti,sysc wrevsysc  Ofck+pIIdmic@0ti,omap4-dmicIwmpudma Wr|Cup_link disabledtarget-module@30000ti,sysc-omap2ti,syscwrevsyscsyss "- Ohfck+pIIwdt@0ti,omap4-wdtti,omap3-wdt WPtarget-module@32000ti,sysc-omap4ti,sysc   wrevsysc  Ofck+p I I okaydefaultmcpdm@0ti,omap4-mcpdmI wmpudma Wp|A|Bup_linkdn_linkpdmclktarget-module@38000ti,sysc-omap4-timerti,sysc wrevsysc  OHfck+pIItimer@0ti,omap4430-timerIOHfcktimer_sys_ck W)target-module@3a000ti,sysc-omap4-timerti,sysc wrevsysc  OPfck+pIItimer@0ti,omap4430-timerIOPfcktimer_sys_ck W*target-module@3c000ti,sysc-omap4-timerti,sysc wrevsysc  OXfck+pIItimer@0ti,omap4430-timerIOXfcktimer_sys_ck W+target-module@3e000ti,sysc-omap4-timerti,sysc wrevsysc  O`fck+pIItimer@0ti,omap4430-timerIO`fcktimer_sys_ck W,]target-module@80000ti,sysc disabled+pIItarget-module@a0000ti,sysc disabled+p I I target-module@c0000ti,sysc disabled+p I I target-module@f1000ti,sysc-omap4ti,sysc wrevsysc  Ofck+pIItarget-module@50000000ti,sysc-omap2ti,syscPPPwrevsyscsyss - fck+pPP@gpmc@50000000ti,omap4430-gpmcP+ W|rxtxNfck,L\p,ethernet@gpmcsmsc,lan9221smsc,lan9115 'A O2a2s  22222-#D#^v#2  W mii   " 2N target-module@52000000ti,sysc-omap4ti,syscRR wrevsysc 8b ofck+ pRtarget-module@54000000ti,sysc-omap4-simpleti,syscb fck+ pTpmuarm,cortex-a9-pmutarget-module@55082000ti,sysc-omap2ti,syscU U U wrevsyscsyss   fck 4rstctrl pU +mmu@0ti,omap4-iommu Wd Ctarget-module@4012c000ti,sysc-omap4ti,sysc@@ wrevsysc  O@fck+p@IItarget-module@4e000000ti,sysc-omap2ti,syscNN wrevsysc  pN+dmm@0 ti,omap4-dmm Wqtarget-module@4c000000ti,sysc-omap4-simpleti,syscLwrev fck|+ pLemif@0 ti,emif-4d Wn Y b y target-module@4d000000ti,sysc-omap4-simpleti,syscMwrev fck|+ pMemif@0 ti,emif-4d Wo Y b y dsp ti,omap4-dsp   d c omap4-dsp-fw.xe64T  disabledipu@55020000 ti,omap4-ipuUwl2ram  44  omap4-ipu-fw.xem3  disabledtarget-module@4b501000ti,sysc-omap2ti,syscKPKPKPwrevsyscsyss - {fck+ pKPaes@0 ti,omap4-aes WU|o|ntxrxtarget-module@4b701000ti,sysc-omap2ti,syscKpKpKpwrevsyscsyss - {fck+ pKpaes@0 ti,omap4-aes W@|r|qtxrxtarget-module@4b100000ti,sysc-omap3-shamti,syscKKKwrevsyscsyss  - {(fck+ pKsham@0ti,omap4-sham W3|wrxregulator-abb-mpu ti,abb-v2abb_mpu+  2 okayJ0{J0`wbase-addressint-addressx O1regulator-abb-iva ti,abb-v2abb_iva+ Ȁ 2  disabledJ0{J0`wbase-addressint-addresstarget-module@56000000ti,sysc-omap4ti,syscVV wrevsyscb fck+ pVqOtarget-module@58000000ti,sysc-omap2ti,syscXX wrevsyss-b0 fckhdmi_clksys_clktv_clk+ pXdss@0 ti,omap4-dssokay fck+ ptarget-module@1000ti,sysc-omap2ti,syscwrevsyscsyss   -  fcksys_clk+ pdispc@0ti,omap4-dispc W fcktarget-module@2000ti,sysc-omap2ti,sysc   wrevsyscsyss  -  fcksys_clk+ p encoder@0 disabledNfckicktarget-module@3000ti,sysc-omap2ti,sysc0wrev sys_clk+ p0encoder@0ti,omap4-venc disabled fcktarget-module@4000ti,sysc-omap2ti,sysc@@@wrevsyscsyss  -+ p@encoder@0 ti,omap4-dsi@ wprotophypll W5 disabled  fcksys_clk+target-module@5000ti,sysc-omap2ti,syscPPPwrevsyscsyss  -+ pPencoder@0 ti,omap4-dsi@ wprotophypll WT disabled  fcksys_clk+target-module@6000ti,sysc-omap4ti,sysc`` wrevsysc   fckdss_clk+ p` encoder@0ti,omap4-hdmi wwppllphycore Weokay  fcksys_clk|L audio_tx defaultportendpoint target-module@5a000000ti,sysc-omap4ti,syscZZ wrevsysc  b rstctrl fck+pZZ[[iva ti,ivahdbandgap@4a002260J"`J#,ti,omap4430-bandgap * 0thermal-zonescpu_thermal F \ j zN tripscpu_alert  passivecpu_crit H  criticalcooling-mapsmap0  memory@80000000memoryʀ@soundti,abe-twl6040 DuoVero I  a Headset StereophoneHSOLHeadset StereophoneHSORHSMICHeadset MicHeadset MicHeadset Mic Biashsusb1_phyusb-nop-xceiv {default1 main_clk"$bw2cbw0015_vmmcdefaultregulator-fixed w2cbw0015- -   p leds gpio-ledsled0 duovero:blue:led0 * "heartbeatgpio_keys gpio-keys+button0 button0 8 * C  Uconnectorhdmi-connector hdmid cportendpoint regulator-vddvarioregulator-fixed vddvariosregulator-vdd33aregulator-fixedvdd33as compatibleinterrupt-parent#address-cells#size-cellsmodelstdout-pathi2c0i2c1i2c2i2c3mmc0mmc1mmc2mmc3mmc4serial0serial1serial2serial3rproc0rproc1display0device_typenext-level-cacheregclocksclock-namesclock-latencyoperating-points#cooling-cellsphandleinterrupt-controller#interrupt-cellscache-unifiedcache-levelinterruptspower-domainsrangesreg-namesti,sysc-sidle#clock-cellsclock-output-namesti,index-starts-at-oneti,bit-shiftclock-multclock-divti,max-divti,dividers#power-domain-cells#reset-cellsti,sysc-maskti,syss-maskti,gpio-always-ongpio-controller#gpio-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parents#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsstatusclock-frequencyti,autoidle-shiftti,invert-autoidle-bitti,index-power-of-twoassigned-clock-ratesti,clock-divti,clock-multti,sysc-midle#dma-cellsdma-channelsdma-requestsinterrupt-namesport1-moderemote-wakeup-connectedphysresetsreset-names#iommu-cellsusb-phyphy-namesmultipointnum-epsram-bitsctrl-moduleinterface-typepower#phy-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rx#hwlock-cellspinctrl-namespinctrl-0sysconregulator-nameregulator-min-microvoltregulator-max-microvoltti,sysc-delay-usinterrupts-extendedti,timer-pwmpagesizeregulator-always-onusb-supply#pwm-cells#io-channel-cellsti,audpwron-gpiovio-supplyv2v1-supplyenable-active-highti,buffer-sizedmasdma-namesti,spi-num-csti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplyti,bus-widthti,non-removablecap-power-off-cardkeep-power-in-suspendsramop-modeserial-dirti,timer-dspti,no-idle-on-initgpmc,num-csgpmc,num-waitpinsbank-widthgpmc,device-widthgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsengpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,access-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsgpmc,wr-data-mux-bus-nsgpmc,wr-access-nsvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addressphy-modegpmc,mux-add-datagpmc,sync-readgpmc,sync-writegpmc,sync-clk-psti,iommu-bus-err-backphy-typehw-caps-read-idle-ctrlhw-caps-ll-interfacehw-caps-temp-alertti,bootregiommusfirmware-namemboxesti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infovdda-supplyremote-endpointgpios#thermal-sensor-cellspolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresistripcooling-deviceti,modelti,mclk-freqti,mcpdmti,twl6040ti,audio-routingreset-gpiosstartup-delay-usregulator-boot-onlabellinux,default-triggerlinux,codedebounce-intervalwakeup-sourcehpd-gpios