8( cX,timll,omap3-devkit8000ti,omap3430ti,omap3 +,7TimLL OMAP3 Devkit8000 with 7.0'' LCD panelchosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/mmc@4809c000Q/ocp@68000000/mmc@480b4000V/ocp@68000000/mmc@480ad000[/ocp@68000000/serial@4806a000c/ocp@68000000/serial@4806c000k/ocp@68000000/serial@49020000 s/display |/connector0 /connector1cpus+cpu@0arm,cortex-a8cpucpupmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+&;Ypinmux_twl4030_pinsvApinmux_dss_dpi_pinsvscm_conf@270sysconsimple-busp0+ p0pbias_regulator@2b0ti,pbias-omap3ti,pbias-omappbias_mmc_omap2430pbias_mmc_omap2430w@-clocks+clock@68 ti,clkselhclock-mcbsp5-mux-fckti,composite-mux-clockmcbsp5_mux_fck clock-mcbsp3-mux-fckti,composite-mux-clockmcbsp3_mux_fckclock-mcbsp4-mux-fckti,composite-mux-clockmcbsp4_mux_fckmcbsp5_fckti,composite-clock clock@4 ti,clkselclock-mcbsp1-mux-fckti,composite-mux-clockmcbsp1_mux_fck clock-mcbsp2-mux-fckti,composite-mux-clockmcbsp2_mux_fck mcbsp1_fckti,composite-clock mcbsp2_fckti,composite-clock mcbsp3_fckti,composite-clockmcbsp4_fckti,composite-clockclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+&;Ypinmux_twl4030_vpins vtarget-module@480a6000ti,sysc-omap2ti,syscH `DH `HH `Lrevsyscsyss "ick+ H ` aes1@0 ti,omap3-aesP/  4txrxtarget-module@480c5000ti,sysc-omap2ti,syscH PDH PHH PLrevsyscsyss "ick+ H P aes2@0 ti,omap3-aesP/AB4txrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clock>Yosc_sys_ck@d40 ti,mux-clock @sys_ck@1270ti,divider-clockNpY sys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clockp{dpll3_m2x2_ckfixed-factor-clockp{dpll4_x2_ckfixed-factor-clockp{corex2_fckfixed-factor-clockp{!wkup_l4_ickfixed-factor-clock p{`corex2_d3_fckfixed-factor-clock!p{corex2_d5_fckfixed-factor-clock!p{clockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clock>omap_32k_fck fixed-clock>Fvirt_12m_ck fixed-clock>virt_13m_ck fixed-clock>]@virt_19200000_ck fixed-clock>$virt_26000000_ck fixed-clock>virt_38_4m_ck fixed-clock>Idpll4_ck@d00ti,omap3-dpll-per-clock  D 0dpll4_m2_ck@d48ti,divider-clockN? HY"dpll4_m2x2_mul_ckfixed-factor-clock"p{#dpll4_m2x2_ck@d00ti,gate-clock# $omap_96m_alwon_fckfixed-factor-clock$p{0dpll3_ck@d00ti,omap3-dpll-core-clock  @ 0clock@1140 ti,clksel@clock-dpll3-m3ti,divider-clock dpll3_m3_ckNY*clock-dpll4-m6ti,divider-clock dpll4_m6_ckN?Y<clock-emu-src-mux ti,mux-clockemu_src_mux_ck %&'tclock-pclk-fckti,divider-clock pclk_fck(NYclock-pclkx2-fckti,divider-clock pclkx2_fck(NYclock-atclk-fckti,divider-clock atclk_fck(NYclock-traceclk-src-fck ti,mux-clocktraceclk_src_fck %&')clock-traceclk-fckti,divider-clock traceclk_fck) NYdpll3_m3x2_mul_ckfixed-factor-clock*p{+dpll3_m3x2_ck@d00ti,gate-clock+  ,emu_core_alwon_ckfixed-factor-clock,p{%sys_altclk fixed-clock>3mcbsp_clks fixed-clock>core_ckfixed-factor-clockp{-dpll1_fck@940ti,divider-clock-N @Y.dpll1_ck@904ti,omap3-dpll-clock .  $ @ 4dpll1_x2_ckfixed-factor-clockp{/dpll1_x2m2_ck@944ti,divider-clock/N DYCcm_96m_fckfixed-factor-clock0p{1clock@d40 ti,clksel @clock-dpll3-m2ti,divider-clock dpll3_m2_ckNYclock-omap-96m-fck ti,mux-clock omap_96m_fck1 Wclock-omap-54m-fck ti,mux-clock omap_54m_fck23?clock-omap-48m-fck ti,mux-clock omap_48m_fck437clock@e40 ti,clksel@clock-dpll4-m3ti,divider-clock dpll4_m3_ckN Y5clock-dpll4-m4ti,divider-clock dpll4_m4_ckNY8dpll4_m3x2_mul_ckfixed-factor-clock5p{6dpll4_m3x2_ck@d00ti,gate-clock6 2cm_96m_d2_fckfixed-factor-clock1p{4omap_12m_fckfixed-factor-clock7p{Xdpll4_m4x2_mul_ckti,fixed-factor-clock89dpll4_m4x2_ck@d00ti,gate-clock9 \dpll4_m5_ck@f40ti,divider-clockN?@Y:dpll4_m5x2_mul_ckti,fixed-factor-clock:;dpll4_m5x2_ck@d00ti,gate-clock; xdpll4_m6x2_mul_ckfixed-factor-clock<p{=dpll4_m6x2_ck@d00ti,gate-clock= >emu_per_alwon_ckfixed-factor-clock>p{&clock@d70 ti,clksel pclock-clkout2-src-gate ti,composite-no-wait-gate-clockclkout2_src_gate_ck-Aclock-clkout2-src-muxti,composite-mux-clockclkout2_src_mux_ck- 1?Bclock-sys-clkout2ti,divider-clock sys_clkout2@N@clkout2_src_ckti,composite-clockAB@mpu_ckfixed-factor-clockCp{Darm_fck@924ti,divider-clockD $Nemu_mpu_alwon_ckfixed-factor-clockDp{'clock@a40 ti,clksel @clock-l3-ickti,divider-clockl3_ick-NYEclock-l4-ickti,divider-clockl4_ickENYGclock-gpt10-mux-fckti,composite-mux-clockgpt10_mux_fckF Tclock-gpt11-mux-fckti,composite-mux-clockgpt11_mux_fckF Vclock-ssi-ssr-div-fck-3430es2ti,composite-divider-clockssi_ssr_div_fck_3430es2!$}clock@c40 ti,clksel @clock-rm-ickti,divider-clockrm_ickGNYclock-gpt1-mux-fckti,composite-mux-clock gpt1_mux_fckF _clock-usim-mux-fckti,composite-mux-clock usim_mux_fck( HIJKLMNOPYclock@a00 ti,clksel clock-gpt10-gate-fckti,composite-gate-clockgpt10_gate_fck  Sclock-gpt11-gate-fckti,composite-gate-clockgpt11_gate_fck  Uclock-mmchs2-fckti,wait-gate-clock mmchs2_fckclock-mmchs1-fckti,wait-gate-clock mmchs1_fckclock-i2c3-fckti,wait-gate-clock i2c3_fckclock-i2c2-fckti,wait-gate-clock i2c2_fckclock-i2c1-fckti,wait-gate-clock i2c1_fckclock-mcbsp5-gate-fckti,composite-gate-clockmcbsp5_gate_fck clock-mcbsp1-gate-fckti,composite-gate-clockmcbsp1_gate_fck  clock-mcspi4-fckti,wait-gate-clock mcspi4_fckQclock-mcspi3-fckti,wait-gate-clock mcspi3_fckQclock-mcspi2-fckti,wait-gate-clock mcspi2_fckQclock-mcspi1-fckti,wait-gate-clock mcspi1_fckQclock-uart2-fckti,wait-gate-clock uart2_fckQclock-uart1-fckti,wait-gate-clock uart1_fckQ clock-hdq-fckti,wait-gate-clockhdq_fckRclock-modem-fckti,omap3-interface-clock modem_fck clock-mspro-fckti,wait-gate-clock mspro_fckclock-ssi-ssr-gate-fck-3430es2 ti,composite-no-wait-gate-clockssi_ssr_gate_fck_3430es2!|clock-mmchs3-fckti,wait-gate-clock mmchs3_fckgpt10_fckti,composite-clockSTgpt11_fckti,composite-clockUVcore_96m_fckfixed-factor-clockWp{core_48m_fckfixed-factor-clock7p{Qcore_12m_fckfixed-factor-clockXp{Rcore_l3_ickfixed-factor-clockEp{Yclock@a10 ti,clksel clock-sdrc-ickti,wait-gate-clock sdrc_ickYclock-mmchs2-ickti,omap3-interface-clock mmchs2_ickZclock-mmchs1-ickti,omap3-interface-clock mmchs1_ickZclock-hdq-ickti,omap3-interface-clockhdq_ickZclock-mcspi4-ickti,omap3-interface-clock mcspi4_ickZclock-mcspi3-ickti,omap3-interface-clock mcspi3_ickZclock-mcspi2-ickti,omap3-interface-clock mcspi2_ickZclock-mcspi1-ickti,omap3-interface-clock mcspi1_ickZclock-i2c3-ickti,omap3-interface-clock i2c3_ickZclock-i2c2-ickti,omap3-interface-clock i2c2_ickZclock-i2c1-ickti,omap3-interface-clock i2c1_ickZclock-uart2-ickti,omap3-interface-clock uart2_ickZclock-uart1-ickti,omap3-interface-clock uart1_ickZ clock-gpt11-ickti,omap3-interface-clock gpt11_ickZ clock-gpt10-ickti,omap3-interface-clock gpt10_ickZ clock-mcbsp5-ickti,omap3-interface-clock mcbsp5_ickZ clock-mcbsp1-ickti,omap3-interface-clock mcbsp1_ickZ clock-omapctrl-ickti,omap3-interface-clock omapctrl_ickZclock-aes2-ickti,omap3-interface-clock aes2_ickZclock-sha12-ickti,omap3-interface-clock sha12_ickZclock-icr-ickti,omap3-interface-clockicr_ickZclock-des2-ickti,omap3-interface-clock des2_ickZclock-mspro-ickti,omap3-interface-clock mspro_ickZclock-mailboxes-ickti,omap3-interface-clockmailboxes_ickZclock-sad2d-ickti,omap3-interface-clock sad2d_ickEclock-hsotgusb-ick-3430es2"ti,omap3-hsotgusb-interface-clockhsotgusb_ick_3430es2Yclock-ssi-ick-3430es2ti,omap3-ssi-interface-clockssi_ick_3430es2[clock-mmchs3-ickti,omap3-interface-clock mmchs3_ickZgpmc_fckfixed-factor-clockYp{core_l4_ickfixed-factor-clockGp{Zclock@e00 ti,clkselclock-dss-tv-fckti,gate-clock dss_tv_fck?clock-dss-96m-fckti,gate-clock dss_96m_fckWclock-dss2-alwon-fckti,gate-clockdss2_alwon_fck clock-dss1-alwon-fck-3430es2ti,dss-gate-clockdss1_alwon_fck_3430es2\dummy_ck fixed-clock>clock@c00 ti,clksel clock-gpt1-gate-fckti,composite-gate-clockgpt1_gate_fck ^clock-gpio1-dbckti,gate-clock gpio1_dbck]clock-wdt2-fckti,wait-gate-clock wdt2_fck]clock-sr1-fckti,wait-gate-clocksr1_fck clock-sr2-fckti,wait-gate-clocksr2_fck clock-usim-gate-fckti,composite-gate-clockusim_gate_fckW gpt1_fckti,composite-clock^_wkup_32k_fckfixed-factor-clockFp{]clock@c10 ti,clksel clock-wdt2-ickti,omap3-interface-clock wdt2_ick`clock-wdt1-ickti,omap3-interface-clock wdt1_ick`clock-gpio1-ickti,omap3-interface-clock gpio1_ick`clock-omap-32ksync-ickti,omap3-interface-clockomap_32ksync_ick`clock-gpt12-ickti,omap3-interface-clock gpt12_ick`clock-gpt1-ickti,omap3-interface-clock gpt1_ick`clock-usim-ickti,omap3-interface-clock usim_ick` per_96m_fckfixed-factor-clock0p{per_48m_fckfixed-factor-clock7p{aclock@1000 ti,clkselclock-uart3-fckti,wait-gate-clock uart3_fcka clock-gpt2-gate-fckti,composite-gate-clockgpt2_gate_fck cclock-gpt3-gate-fckti,composite-gate-clockgpt3_gate_fck eclock-gpt4-gate-fckti,composite-gate-clockgpt4_gate_fck gclock-gpt5-gate-fckti,composite-gate-clockgpt5_gate_fck iclock-gpt6-gate-fckti,composite-gate-clockgpt6_gate_fck kclock-gpt7-gate-fckti,composite-gate-clockgpt7_gate_fck mclock-gpt8-gate-fckti,composite-gate-clockgpt8_gate_fck  oclock-gpt9-gate-fckti,composite-gate-clockgpt9_gate_fck  qclock-gpio6-dbckti,gate-clock gpio6_dbckbclock-gpio5-dbckti,gate-clock gpio5_dbckbclock-gpio4-dbckti,gate-clock gpio4_dbckbclock-gpio3-dbckti,gate-clock gpio3_dbckbclock-gpio2-dbckti,gate-clock gpio2_dbckb clock-wdt3-fckti,wait-gate-clock wdt3_fckb clock-mcbsp2-gate-fckti,composite-gate-clockmcbsp2_gate_fck clock-mcbsp3-gate-fckti,composite-gate-clockmcbsp3_gate_fckclock-mcbsp4-gate-fckti,composite-gate-clockmcbsp4_gate_fckclock@1040 ti,clksel@clock-gpt2-mux-fckti,composite-mux-clock gpt2_mux_fckF dclock-gpt3-mux-fckti,composite-mux-clock gpt3_mux_fckF fclock-gpt4-mux-fckti,composite-mux-clock gpt4_mux_fckF hclock-gpt5-mux-fckti,composite-mux-clock gpt5_mux_fckF jclock-gpt6-mux-fckti,composite-mux-clock gpt6_mux_fckF lclock-gpt7-mux-fckti,composite-mux-clock gpt7_mux_fckF nclock-gpt8-mux-fckti,composite-mux-clock gpt8_mux_fckF pclock-gpt9-mux-fckti,composite-mux-clock gpt9_mux_fckF rgpt2_fckti,composite-clockcdgpt3_fckti,composite-clockefgpt4_fckti,composite-clockghgpt5_fckti,composite-clockijgpt6_fckti,composite-clockklgpt7_fckti,composite-clockmngpt8_fckti,composite-clockopgpt9_fckti,composite-clockqrper_32k_alwon_fckfixed-factor-clockFp{bper_l4_ickfixed-factor-clockGp{sclock@1010 ti,clkselclock-gpio6-ickti,omap3-interface-clock gpio6_icksclock-gpio5-ickti,omap3-interface-clock gpio5_icksclock-gpio4-ickti,omap3-interface-clock gpio4_icksclock-gpio3-ickti,omap3-interface-clock gpio3_icksclock-gpio2-ickti,omap3-interface-clock gpio2_icks clock-wdt3-ickti,omap3-interface-clock wdt3_icks clock-uart3-ickti,omap3-interface-clock uart3_icks clock-uart4-ickti,omap3-interface-clock uart4_icksclock-gpt9-ickti,omap3-interface-clock gpt9_icks clock-gpt8-ickti,omap3-interface-clock gpt8_icks clock-gpt7-ickti,omap3-interface-clock gpt7_icksclock-gpt6-ickti,omap3-interface-clock gpt6_icksclock-gpt5-ickti,omap3-interface-clock gpt5_icksclock-gpt4-ickti,omap3-interface-clock gpt4_icksclock-gpt3-ickti,omap3-interface-clock gpt3_icksclock-gpt2-ickti,omap3-interface-clock gpt2_icksclock-mcbsp2-ickti,omap3-interface-clock mcbsp2_icksclock-mcbsp3-ickti,omap3-interface-clock mcbsp3_icksclock-mcbsp4-ickti,omap3-interface-clock mcbsp4_icksemu_src_ckti,clkdm-gate-clockt(secure_32k_fck fixed-clock>ugpt12_fckfixed-factor-clockup{wdt1_fckfixed-factor-clockup{security_l4_ick2fixed-factor-clockGp{vclock@a14 ti,clksel clock-aes1-ickti,omap3-interface-clock aes1_ickvclock-rng-ickti,omap3-interface-clockrng_ickvclock-sha11-ickti,omap3-interface-clock sha11_ickvclock-des1-ickti,omap3-interface-clock des1_ickvclock-pka-ickti,omap3-interface-clockpka_ickwclock@f00 ti,clkselclock-cam-mclkti,gate-clock cam_mclkxclock-csi2-96m-fckti,gate-clock csi2_96m_fckcam_ick@f10!ti,omap3-no-wait-interface-clockGsecurity_l3_ickfixed-factor-clockEp{wssi_l4_ickfixed-factor-clockGp{[sr_l4_ickfixed-factor-clockGp{dpll2_fck@40ti,divider-clock-N@Yydpll2_ck@4ti,omap3-dpll-clock y$@4zdpll2_m2_ck@44ti,divider-clockzNDY{iva2_ck@0ti,wait-gate-clock{clock@a18 ti,clksel clock-mad2d-ickti,omap3-interface-clock mad2d_ickEclock-usbtll-ickti,omap3-interface-clock usbtll_ickZssi_ssr_fck_3430es2ti,composite-clock|}~ssi_sst_fck_3430es2fixed-factor-clock~p{sys_d2_ckfixed-factor-clock p{Homap_96m_d2_fckfixed-factor-clockWp{Iomap_96m_d4_fckfixed-factor-clockWp{Jomap_96m_d8_fckfixed-factor-clockWp{Komap_96m_d10_fckfixed-factor-clockWp{ Ldpll5_m2_d4_ckfixed-factor-clockp{Mdpll5_m2_d8_ckfixed-factor-clockp{Ndpll5_m2_d16_ckfixed-factor-clockp{Odpll5_m2_d20_ckfixed-factor-clockp{Pusim_fckti,composite-clockdpll5_ck@d04ti,omap3-dpll-clock   $ L 4dpll5_m2_ck@d50ti,divider-clockN PYsgx_gate_fck@b00ti,composite-gate-clock- core_d3_ckfixed-factor-clock-p{core_d4_ckfixed-factor-clock-p{core_d6_ckfixed-factor-clock-p{omap_192m_alwon_fckfixed-factor-clock$p{core_d2_ckfixed-factor-clock-p{sgx_mux_fck@b40ti,composite-mux-clock 1 @sgx_fckti,composite-clocksgx_ick@b10ti,wait-gate-clockE cpefuse_fck@a08ti,gate-clock  ts_fck@a08ti,gate-clockF usbtll_fck@a08ti,wait-gate-clock dss_ick_3430es2@e10ti,omap3-dss-interface-clockGusbhost_120m_fck@1400ti,gate-clockusbhost_48m_fck@1400ti,dss-gate-clock7usbhost_ick@1410ti,omap3-dss-interface-clockGclockdomainscore_l3_clkdmti,clockdomaindpll3_clkdmti,clockdomaindpll1_clkdmti,clockdomainper_clkdmti,clockdomainhemu_clkdmti,clockdomain(dpll4_clkdmti,clockdomainwkup_clkdmti,clockdomain$dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaincam_clkdmti,clockdomainiva2_clkdmti,clockdomaindpll2_clkdmti,clockdomainzd2d_clkdmti,clockdomain dpll5_clkdmti,clockdomainsgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain target-module@48320000ti,sysc-omap2ti,syscH2H2 revsysc]fckick+ H2counter@0ti,omap-counter32k interrupt-controller@48200000ti,omap3-intc&H target-module@48056000ti,sysc-omap2ti,syscH`H`,H`(revsyscsyss#  "Yick+ H`dma-controller@0ti,omap3430-sdmati,omap-sdma '2 ?`gpio@48310000ti,omap3-gpioH1gpio1L^n&gpio@49050000ti,omap3-gpioIgpio2^n&gpio@49052000ti,omap3-gpioI gpio3^n&gpio@49054000ti,omap3-gpioI@ gpio4^n&gpio@49056000ti,omap3-gpioI`!gpio5^n&gpio@49058000ti,omap3-gpioI"gpio6^n&serial@4806a000ti,omap3-uartH zH/124txrxuart1>lserial@4806c000ti,omap3-uartHzI/344txrxuart2>lserial@49020000ti,omap3-uartIzJ/564txrxuart3>li2c@48070000 ti,omap3-i2cH8+i2c1>'@twl@48H ti,twl4030&defaultaudioti,twl4030-audiocodecrtcti,twl4030-rtc bciti,twl4030-bci  vacwatchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1 ' regulator-vdacti,twl4030-vdacw@w@regulator-vioti,twl4030-viow@w@regulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1:0regulator-vmmc2ti,twl4030-vmmc2:0regulator-vusb1v5ti,twl4030-vusb1v5regulator-vusb1v8ti,twl4030-vusb1v8regulator-vusb3v1ti,twl4030-vusb3v1regulator-vpll1ti,twl4030-vpll1 vdds_dsiw@w@regulator-vpll2ti,twl4030-vpll2w@w@regulator-vsimti,twl4030-vsimw@-gpioti,twl4030-gpio^n& twl4030-usbti,twl4030-usb pwmti,twl4030-pwm(pwmledti,twl4030-pwmled(pwrbuttonti,twl4030-pwrbuttonkeypadti,twl4030-keypad3CDV?  @A Bsrmadcti,twl4030-madcci2c@48072000 ti,omap3-i2cH 9+i2c2> i2c@48060000 ti,omap3-i2cH=+i2c3 udisabledmailbox@48094000ti,omap3-mailboxmailboxH @|mbox-dsp  spi@48098000ti,omap2-mcspiH A+mcspi1@/#$%&'()* 4tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspiH B+mcspi2 /+,-.4tx0rx0tx1rx1ads7846@0 ti,ads7846`   .> N^n~spi@480b8000ti,omap2-mcspiH [+mcspi3 /4tx0rx0tx1rx1spi@480ba000ti,omap2-mcspiH 0+mcspi4/FG4tx0rx01w@480b2000 ti,omap3-1wH :hdq1wmmc@4809c000ti,omap3-hsmmcH Smmc1/=>4txrxmmc@480b4000ti,omap3-hsmmcH @Vmmc2//04txrx udisabledmmc@480ad000ti,omap3-hsmmcH ^mmc3/MN4txrx udisabledmmu@480bd400ti,omap2-iommuH mmu_ispmmu@5d000000ti,omap2-iommu]mmu_iva udisabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2 udisabledmcbsp@48074000ti,omap3-mcbspH@mpu ;< commontxrx mcbsp1/ 4txrxfck udisabledtarget-module@480a0000ti,sysc-omap2ti,syscH <H @H Drevsyscsyss"ick+ H rng@0 ti,omap2-rng 4mcbsp@49022000ti,omap3-mcbspI I mpusidetone>?commontxrxsidetone mcbsp2mcbsp2_sidetone/!"4txrxfckickuokay mcbsp@49024000ti,omap3-mcbspI@I mpusidetoneYZcommontxrxsidetone mcbsp3mcbsp3_sidetone/4txrxfckick udisabledmcbsp@49026000ti,omap3-mcbspI`mpu 67 commontxrx mcbsp4/4txrxfck udisabledmcbsp@48096000ti,omap3-mcbspH `mpu QR commontxrx mcbsp5/4txrxfck udisabledsham@480c3000ti,omap3-shamshamH 0d1/E4rxtarget-module@48318000ti,sysc-omap2-timerti,syscH1H1H1revsyscsyss' "fckick+ H1timer@0ti,omap3430-timerfck%+;Ftarget-module@49032000ti,sysc-omap2-timerti,syscI I I revsyscsyss' "fckick+ I timer@0ti,omap3430-timer&timer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer5Rtimer@4903a000ti,omap3430-timerI*timer6Rtimer@4903c000ti,omap3430-timerI+timer7Rtimer@4903e000ti,omap3430-timerI,timer8_Rtimer@49040000ti,omap3430-timerI-timer9_timer@48086000ti,omap3430-timerH`.timer10_timer@48088000ti,omap3430-timerH/timer11_target-module@48304000ti,sysc-omap2-timerti,syscH0@H0@H0@revsyscsyss' "fckick+ H0@ltimer@0ti,omap3430-timer_usbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs+ohci@48064400ti,ohci-omap3HDLehci@48064800 ti,ehci-omapHHMgpmc@6e000000ti,omap3430-gpmcgpmcn/4rxtx+&^n 0,nand@0,0ti,omap2-nand  sw"0,B,Tc"v,(6@RR(+x-loader@0 X-Loaderbootloaders@80000U-Bootbootloaders_env@260000 U-Boot Env&kernel@280000Kernel(@filesystem@680000 File Systemhethernet@6,0davicom,dm9000 %7E_"0BTcv0y66ZZusb_otg_hs@480ab000ti,omap3-musbH \]mcdma usb_otg_hs   " dss@48050000 ti,omap3-dssHuokay dss_corefck+default + ;dispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H protophypll udisabled dss_dsi1 fcksys_clk+encoder@48050800ti,omap3-rfbiH udisabled dss_rfbifckickencoder@48050c00ti,omap3-vencH uokay dss_vencfck Kportendpoint W gport+endpoint@0 W s endpoint@1 W sssi-controller@48058000 ti,omap3-ssissiuokayHHsysgddGgdd_mpu+ ~ ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portHHtxrxCDssi-port@4805b000ti,omap3-ssi-portHHtxrxEFpinmux@480025d8 ti,omap3-padconfpinctrl-singleH%$+&;Yisp@480bc000 ti,omap3-ispH H | ~l ports+bandgap@48002524H%$ti,omap34xx-bandgap target-module@480cb000ti,sysc-omap3430-srti,syscsmartreflex_coreH $syscfck+ H smartreflex@0ti,omap3-smartreflex-coretarget-module@480c9000ti,sysc-omap3430-srti,syscsmartreflex_mpu_ivaH $syscfck+ H smartreflex@480c9000ti,omap3-smartreflex-mpu-ivatarget-module@50000000ti,sysc-omap2ti,syscPrevfckick+ P@opp-tableoperating-points-v2-ti-cpuopp1-125000000 sY@  opp2-250000000 沀 g8g8g8  opp3-500000000 e OOO opp4-550000000 U txtxtx opp5-600000000 #F ppp opp6-720000000 *T ppp  thermal-zonescpu-thermal   N  tripscpu_alert %8 1passivecpu_crit %_ 1 criticalcooling-mapsmap0 < Amemory@80000000memoryleds gpio-ledsheartbeatdevkit8000::led1 P Von dheartbeatmmcdevkit8000::led2 P Von dnoneusrdevkit8000::led3 P Von dusrpmu_statdevkit8000::pmu_stat P soundti,omap-twl4030 zdevkit8000  I Ext SpkPREDRIVELExt SpkPREDRIVERMAINMICMain MicMain MicMic Bias 1gpio_keys gpio-keysuseruser P encoder0 ti,tfp410  ports+port@0endpoint W port@1endpoint W connector0dvi-connectordvi   portendpoint W connector1svideo-connectortvportendpoint Wdisplay panel-dpilcd  portendpoint Wpanel-timing>bZ      0    % / < I S compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2display0display1display2device_typeregclocksclock-namesclock-latencyoperating-points-v2#cooling-cellsphandleinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsclock-output-namesti,bit-shiftreg-namesti,sysc-maskti,sysc-sidleti,syss-maskdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,dividersti,low-power-stopti,lockti,low-power-bypassti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpinctrl-namespinctrl-0bci3v1-supplyio-channelsio-channel-namesti,use-ledsti,pulldownsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnslinux,keymap#io-channel-cellsstatus#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csvcc-supplyspi-max-frequencypendown-gpioti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,debounce-maxti,debounce-tolti,debounce-repti,keep-vref-onti,settle-delay-usecwakeup-sourceti,dual-voltpbias-supplyvmmc-supplyvqmmc-supplybus-width#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,no-reset-on-initti,no-idleti,timer-alwonti,timer-secureremote-wakeup-connectedgpmc,num-csgpmc,num-waitpinsnand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nslabelbank-widthdavicom,no-eepromgpmc,mux-add-datagpmc,wait-pingpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsengpmc,oe-on-nsgpmc,we-on-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsmultipointnum-epsram-bitsvdds_dsi-supplyvdda_dac-supplyvdda-supplyremote-endpointti,channelsdata-linesiommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modepolling-delay-passivepolling-delaycoefficientsthermal-sensorstemperaturehysteresistripcooling-devicegpiosdefault-statelinux,default-triggerti,modelti,mcbspti,audio-routinglinux,codepowerdown-gpiosdigitalddc-i2c-busenable-gpioshactivevactivehfront-porchhback-porchhsync-lenvback-porchvfront-porchvsync-lenhsync-activevsync-activede-activepixelclk-active