c8\(\Freescale i.MX6SLL EVK Board!fsl,imx6sll-evkfsl,imx6sllaliases,/soc/bus@2000000/gpio@209c0002/soc/bus@2000000/gpio@20a00008/soc/bus@2000000/gpio@20a4000>/soc/bus@2000000/gpio@20a8000D/soc/bus@2000000/gpio@20ac000J/soc/bus@2000000/gpio@20b0000P/soc/bus@2100000/i2c@21a0000U/soc/bus@2100000/i2c@21a4000Z/soc/bus@2100000/i2c@21a8000_/soc/bus@2100000/mmc@2190000d/soc/bus@2100000/mmc@2194000i/soc/bus@2100000/mmc@21980001n/soc/bus@2000000/spba-bus@2000000/serial@20200001v/soc/bus@2000000/spba-bus@2000000/serial@20240001~/soc/bus@2000000/spba-bus@2000000/serial@20340001/soc/bus@2000000/spba-bus@2000000/serial@2018000 /soc/bus@2100000/serial@21f4000./soc/bus@2000000/spba-bus@2000000/spi@2008000./soc/bus@2000000/spba-bus@2000000/spi@200c000./soc/bus@2000000/spba-bus@2000000/spi@2010000./soc/bus@2000000/spba-bus@2000000/spi@2014000/soc/bus@2100000/usb@2184000/soc/bus@2100000/usb@2184200!/soc/bus@2000000/usb-phy@20c9000!/soc/bus@2000000/usb-phy@20ca000cpuscpu@0!arm,cortex-a9cpu 2tx  g8p 2  pl(,I%34)3armpll2_pfd2_396msteppll1_swpll1_sys? Kspeed_grade\gclock-ckil !fixed-clockrckil clock-osc-24m !fixed-clockrn6oscclock-ipp-di0 !fixed-clockripp_di0clock-ipp-di1 !fixed-clockripp_di1soc !simple-bussram@900000 !mmio-sram interrupt-controller@a01000!arm,cortex-a9-giccache-controller@a02000!arm,pl310-cache  \   bus@2000000!fsl,aips-bussimple-busspba-bus@2000000!fsl,spba-bussimple-busspdif@2004000!!fsl,imx6sl-spdiffsl,imx35-spdif@@ 4 .3rxtxP,Q93corerxtx0rxtx1rxtx2rxtx3rxtx4rxtx5rxtx6rxtx7dma =disabledspi@2008000!!fsl,imx6ul-ecspifsl,imx51-ecspi@  .3rxtx,jj3ipgper =disabledspi@200c000!!fsl,imx6ul-ecspifsl,imx51-ecspi@   .3rxtx,kk3ipgper =disabledspi@2010000!!fsl,imx6ul-ecspifsl,imx51-ecspi@ ! .3rxtx,ll3ipgper =disabledspi@2014000!!fsl,imx6ul-ecspifsl,imx51-ecspi@@ " .  3rxtx,mm3ipgper =disabledserial@2018000.!fsl,imx6sl-uartfsl,imx6q-uartfsl,imx21-uart@  . 3rxtx,pq3ipgper =disabledserial@2020000.!fsl,imx6sl-uartfsl,imx6q-uartfsl,imx21-uart@  .3rxtx,3ipgper=okayDdefaultR serial@2024000.!fsl,imx6sl-uartfsl,imx6q-uartfsl,imx21-uart@@  .3rxtx,hi3ipgper =disabledssi@2028000!fsl,imx6sl-ssifsl,imx51-ssi@ . .%&3rxtx\, 3ipgbaud =disabledssi@202c000!fsl,imx6sl-ssifsl,imx51-ssi@ / .)*3rxtx\, 3ipgbaud=okay<ssi@2030000!fsl,imx6sl-ssifsl,imx51-ssi@ 0 .-.3rxtx\, 3ipgbaud =disabledserial@2034000.!fsl,imx6sl-uartfsl,imx6q-uartfsl,imx21-uart@@  .krxtx,no3ipgper =disabledpwm@2080000!fsl,imx6sll-pwmfsl,imx27-pwm@ S,3ipgpertDdefaultR =okay/pwm@2084000!fsl,imx6sll-pwmfsl,imx27-pwm@@ T,3ipgpertpwm@2088000!fsl,imx6sll-pwmfsl,imx27-pwm@ U,3ipgpertpwm@208c000!fsl,imx6sll-pwmfsl,imx27-pwm@ V,3ipgperttimer@2098000!fsl,imx6sl-gpt @ 7,tu3ipgpergpio@209c000 !fsl,imx6sll-gpiofsl,imx35-gpio @BC,  ^ gpio@20a0000 !fsl,imx6sll-gpiofsl,imx35-gpio @DE, 2 1gpio@20a4000 !fsl,imx6sll-gpiofsl,imx35-gpio @@FG,P R g e   'gpio@20a8000 !fsl,imx6sll-gpiofsl,imx35-gpio @HI,   k            }    "gpio@20ac000 !fsl,imx6sll-gpiofsl,imx35-gpio @JK,P      ~ x { v z | u y w t s     gpio@20b0000 !fsl,imx6sll-gpiofsl,imx35-gpio @LM,keypad@20b8000!fsl,imx6sll-kppfsl,imx21-kpp @ R, =disabledwatchdog@20bc000!fsl,imx6sll-wdtfsl,imx21-wdt @ P,DdefaultR watchdog@20c0000!fsl,imx6sll-wdtfsl,imx21-wdt @ Q, =disabledclock-controller@20c4000!fsl,imx6sll-ccm @@WXr, 3ckiloscipp_di0ipp_di1;anatop@20c80006!fsl,imx6sll-anatopfsl,imx6q-anatopsysconsimple-mfd @$16regulator-3p0@20c8120!fsl,anatop-regulator vdd3p0(  3@" 4I^q( 3@temperature-sensor'!fsl,imx6sll-tempmonfsl,imx6sx-tempmon 1?Kcalibtemp_grade,usb-phy@20c90006!fsl,imx6sll-usbphyfsl,imx6ul-usbphyfsl,imx23-usbphy  (,usb-phy@20ca0006!fsl,imx6sll-usbphyfsl,imx6ul-usbphyfsl,imx23-usbphy  ), snvs@20cc000#!fsl,sec-v4.0-monsysconsimple-mfd @snvs-rtc-lp!fsl,sec-v4.0-mon-rtc-lp-4snvs-poweroff!syscon-poweroff-8a=okaysnvs-powerkey!fsl,sec-v4.0-pwrkey t=okayreset-controller@20d8000!fsl,imx6sll-srcfsl,imx51-src @[` interrupt-controller@20dc000!fsl,imx6sll-gpcfsl,imx6q-gpc @ Ypinctrl@20e0000!fsl,imx6sll-iomuxc@ audmux3grpxLA0PA0TAHA0XA0.hpgrpLpY;sd3vmmcgrpTpY6vbus1grpD pY2vbus2grpLpY3reglcd3v3grpPpY4sd1vmmcgrp<pY5uart1grp0`\D usdhc1grppY0YpYpYpYpYusdhc1grp_100mhzp0pppp usdhc1grp_200mhzp0pppp!usbotg1grp\pYusdhc3grp$pa 0a(pa,pa0pa4papY$usdhc3grp_100mhz$p 0(p,p0p4ppY%usdhc3grp_200mhz$p 0(p,p0p4ppY&i2c1grp0d|@h@)i2c3grp0x@@A|D@A*lcdgrpyy y$y(y,y0y4y8y<y@yD yHyL yPyTyX y\$y`( yd,$yh0(yl4,yp80yt<4yyy yyyledgrppY0pmw1grp  wdog1grpp iomuxc-gpr@20e40003!fsl,imx6sll-iomuxc-gprfsl,imx6q-iomuxc-gprsyscon@@csi@20e8000!fsl,imx6sll-csifsl,imx6s-csi@ ,v3disp-axicsi_mclkdisp_dcic =disableddma-controller@20ec000!!fsl,imx6sll-sdmafsl,imx6ul-sdma@ ,Q3ipgahb +0imx/sdma/sdma-imx6q.binpxp@20f0000 !fsl,imx6sll-pxpfsl,imx6ull-pxp@bf,|3axilcd-controller@20f8000"!fsl,imx6sll-lcdiffsl,imx28-lcdif@ ',{3pixaxidisp_axi=okayDdefaultRportendpointI:crypto@20fc000!fsl,imx28-dcp@$cde,g3dcpbus@2100000!fsl,aips-bussimple-bususb@2184000-!fsl,imx6sll-usbfsl,imx6ul-usbfsl,imx27-usb@ +,Ydp=okayDdefaultRusb@2184200-!fsl,imx6sll-usbfsl,imx6ul-usbfsl,imx27-usbB *,Ydp=okayhostusbmisc@21848009!fsl,imx6sll-usbmiscfsl,imx6ul-usbmiscfsl,imx6q-usbmiscHmmc@2190000#!fsl,imx6sll-usdhcfsl,imx6sx-usdhc@ , 3ipgahbper =okay"Ddefaultstate_100mhzstate_200mhzR2 <! F" O"Xn#mmc@2194000#!fsl,imx6sll-usdhcfsl,imx6sx-usdhc@@ , 3ipgahbper  =disabledmmc@2198000#!fsl,imx6sll-usdhcfsl,imx6sx-usdhc@ , 3ipgahbper =okay"Ddefaultstate_100mhzstate_200mhzR$2%<& F'Xn(i2c@21a0000!fsl,imx6sll-i2cfsl,imx21-i2c@ $,w=okayDdefaultR)pmic@8 !fsl,pfuze100regulatorssw1ab 8zjsw1c 8zjsw2 5 2Zzsw3a "zsw3b "zsw4 5 2ZswbstLK@ N0vsnvsB@ -zvrefddrzvgen1 5 vgen2 5 vgen3w@ 2Z+vgen4w@ 2Zvgen5w@ 2Zvgen6w@ 2Zi2c@21a4000!fsl,imx6sll-i2cfsl,imx21-i2c@@ %,x =disabledi2c@21a8000!fsl,imx6sll-i2cfsl,imx21-i2c@ &,y=okayDdefaultR*audio-codec@1a !wlf,wm8962,+,++,+--=memory-controller@21b0000 !fsl,imx6sll-mmdcfsl,imx6q-mmdc@,rng@21b4000 !fsl,imx6sll-rngbfsl,imx25-rngb@@ ,efuse@21bc000!fsl,imx6sll-ocotpsyscon@,zspeed-grade@10calib@388temp-grade@20 audmux@21d8000$!fsl,imx6sll-audmuxfsl,imx31-audmux@=okayDdefaultR.serial@21f4000/!fsl,imx6sll-uartfsl,imx6q-uartfsl,imx21-uart@@  .!"3rxtx,}~3ipgper =disabledchosen1"/soc/bus@2000000/spba-bus@2000000/serial@2020000memory@80000000memoryЀbacklight-display!pwm-backlight ./LK@ 3 @E=okay7leds !gpio-ledsDdefaultR0user^debug I1 dheartbeatregulator-otg1-vbus!regulator-fixedDdefaultR2usb_otg1_vbusLK@ LK@ z"regulator-otg2-vbus!regulator-fixedDdefaultR3usb_otg2_vbusLK@ LK@ z"regulator-aud3v!regulator-fixedwm8962-supply-3v150 0z,regulator-aud4v!regulator-fixedwm8962-supply-4v2A Az-regulator-lcd-3v3!regulator-fixedDdefaultR4lcd-3v3 z"8regulator-lcd-5v!regulator-fixedlcd-5v0LK@ LK@9regulator-sd1-vmmc!regulator-fixedDdefaultR5 SD1_SPWR- - z'#regulator-sd3-vmmc!regulator-fixedDdefaultR6 SD3_WIFI- - z"(panel !sii,43wvf1g789portendpointI:sound+!fsl,imx6sl-evk-wm8962fsl,imx-audio-wm8962DdefaultR; wm8962-audio<=cHeadphone JackHPOUTLHeadphone JackHPOUTRExt SpkSPKOUTLExt SpkSPKOUTRAMICMICBIASIN3RAMIC " #address-cells#size-cellsmodelcompatiblegpio0gpio1gpio2gpio3gpio4gpio5i2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2serial3serial4spi0spi1spi3spi4usb0usb1usbphy0usbphy1device_typeregnext-level-cacheoperating-pointsfsl,soc-operating-pointsclock-latency#cooling-cellsclocksclock-namesnvmem-cellsnvmem-cell-namesarm-supplysoc-supply#clock-cellsclock-frequencyclock-output-namesphandleinterrupt-parentranges#interrupt-cellsinterrupt-controllerinterruptscache-unifiedcache-levelarm,tag-latencyarm,data-latencydmasdma-namesstatuspinctrl-namespinctrl-0fsl,fifo-depthdma-name#pwm-cellsgpio-controller#gpio-cellsgpio-rangesfsl,ext-reset-outputassigned-clocksassigned-clock-parentsregulator-nameregulator-min-microvoltregulator-max-microvoltanatop-reg-offsetanatop-vol-bit-shiftanatop-vol-bit-widthanatop-min-bit-valanatop-min-voltageanatop-max-voltageanatop-enable-bitfsl,tempmonphy-3p0-supplyfsl,anatopphy-reg_3p0-supplyregmapmasklinux,keycodewakeup-source#reset-cellsfsl,pins#dma-cellsiramfsl,sdma-ram-script-nameremote-endpointfsl,usbphyfsl,usbmiscahb-burst-configtx-burst-size-dwordrx-burst-size-dwordvbus-supplydisable-over-currentsrp-disablehnp-disableadp-disabledr_mode#index-cellsbus-widthfsl,tuning-stepfsl,tuning-start-tappinctrl-1pinctrl-2cd-gpioswp-gpioskeep-power-in-suspendvmmc-supplyregulator-boot-onregulator-always-onregulator-ramp-delayDCVDD-supplyDBVDD-supplyAVDD-supplyCPVDD-supplyMICVDD-supplyPLLVDD-supplySPKVDD1-supplySPKVDD2-supplystdout-pathpwmsbrightness-levelsdefault-brightness-levellabellinux,default-triggergpioenable-active-highbacklightdvdd-supplyavdd-supplyaudio-cpuaudio-codecaudio-routingmux-int-portmux-ext-porthp-det-gpio