Ð þíTH”(ÀLCalxeda Highbankcalxeda,highbank cpus cpu@900arm,cortex-a9,cpu8 <MTcpu0`Ö B@O€B@ÈàB@ 5B@€B@ @B@q† cpu@901arm,cortex-a9,cpu8 <MTcpu0`Ö B@O€B@ÈàB@ 5B@€B@ @B@q† cpu@902arm,cortex-a9,cpu8 <MTcpu0`Ö B@O€B@ÈàB@ 5B@€B@ @B@q† cpu@903arm,cortex-a9,cpu8 <MTcpu0`Ö B@O€B@ÈàB@ 5B@€B@ @B@q† memory@0,memory8ÿsoc ÿÿÿÿ  simple-bus†memory-controller@fff00000calxeda,hb-ddr-ctrl8ÿð —[timer@fff10600arm,cortex-a9-twd-timer8ÿñ  — Mwatchdog@fff10620arm,cortex-a9-twd-wdt8ÿñ  —Minterrupt-controller@fff11000arm,cortex-a9-gic¢³8ÿñÿñÈcache-controllerarm,pl310-cache8ÿñ  —FÐÞÈpmuarm,cortex-a9-pmu0—LKJIsregs@fff3c200calxeda,hb-sregs-l2-ecc8ÿó—GHsata@ffe08000calxeda,hb-ahci8ÿà€ —Sê(÷$ sdhci@ffe0e000calxeda,hb-sdhci8ÿàà —ZM .disabledipc@fff20000arm,pl320arm,primecell8ÿò —M  Tapb_pclkgpio@fff300005arm,pl061arm,primecellA8ÿó —M  Tapb_pclk .disabledgpio@fff310005arm,pl061arm,primecellA8ÿó —M  Tapb_pclk .disabledgpio@fff320005arm,pl061arm,primecellA8ÿó  —M  Tapb_pclk .disabledgpio@fff330005arm,pl061arm,primecellA8ÿó0 —M  Tapb_pclk .disabledÈtimer@fff34000arm,sp804arm,primecell8ÿó@ —M  Tapb_pclkrtc@fff35000arm,pl031arm,primecell8ÿóP —M  Tapb_pclkserial@fff36000arm,pl011arm,primecell8ÿó` —M Tuartclkapb_pclksmic@fff3a000 ipmi-smic,ipmi8ÿó  —QZsregs@fff3c000calxeda,hb-sregs8ÿóÀclocks oscillatorf fixed-clocksüŸÈ ddrpllfcalxeda,hb-pll-clockM 8a9pllfcalxeda,hb-pll-clockM 8Èa9periphclkfcalxeda,hb-a9periph-clockM8Èa9bclkfcalxeda,hb-a9bus-clockM8emmcpllfcalxeda,hb-pll-clockM 8 È eclkfcalxeda,hb-emmc-clockM 8Èpclkf fixed-clocksðÑ€È dma@fff3d000arm,pl330arm,primecell8ÿóÐ —\M  Tapb_pclkethernet@fff50000calxeda,hb-xgmac8ÿõ$—MNOêethernet@fff51000calxeda,hb-xgmac8ÿõ$—PQRêcombo-phy@fff58000calxeda,hb-combophyƒ8ÿõ€ŽÈcombo-phy@fff5d000calxeda,hb-combophyƒ8ÿõÐŽÈchosen•console=ttyAMA0psci arm,pscižsmc¥„±„¹„ modelcompatible#address-cells#size-cellsdevice_typeregnext-level-cacheclocksclock-namesoperating-pointsclock-latencyrangesinterrupt-parentinterrupts#interrupt-cellsinterrupt-controllerphandlecache-unifiedcache-leveldma-coherentcalxeda,port-physcalxeda,sgpio-gpiocalxeda,led-orderstatus#gpio-cellsgpio-controllerreg-sizereg-spacing#clock-cellsclock-frequency#phy-cellsphydevbootargsmethodcpu_suspendcpu_offcpu_on