8( L\#radxa,rock2-squarerockchip,rk3288&7Radxa Rock 2 Squarealiases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/mmc@ff0f0000k/mmc@ff0c0000q/mmc@ff0d0000w/mmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12'@5<rV bcpu@501cpuarm,cortex-a12'@5<rbcpu@502cpuarm,cortex-a12'@5<rbcpu@503cpuarm,cortex-a12'@5<rbopp-table-0operating-points-v2jbopp-126000000u| opp-216000000u | opp-312000000u| opp-408000000uQ| opp-600000000u#F| opp-696000000u)||~opp-816000000u0,|B@opp-1008000000u<|opp-1200000000uG|opp-1416000000uTfr|Oopp-1512000000uZJ| opp-1608000000u_"|preserved-memorydma-unusable@fe000000oscillator fixed-clockn6xin24mb timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 5a  pclktimerdisplay-subsystemrockchip,display-subsystem mmc@ff0c0000rockchip,rk3288-dw-mshcр 5Drvbiuciuciu-driveciu-sample  @'reset3okay:DVgydefault mmc@ff0d0000rockchip,rk3288-dw-mshcр 5Eswbiuciuciu-driveciu-sample ! @'reset3okay:Vdefaultmmc@ff0e0000rockchip,rk3288-dw-mshcр 5Ftxbiuciuciu-driveciu-sample "@'reset 3disabledmmc@ff0f0000rockchip,rk3288-dw-mshcр 5Guybiuciuciu-driveciu-sample #@'reset3okay:Dydefault saradc@ff100000rockchip,saradc $5I[saradcapb_pclkW 'saradc-apb3okaybspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi5ARspiclkapb_pclk  txrx ,default !"# 3disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi5BSspiclkapb_pclk txrx -default$%&' 3disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi5CTspiclkapb_pclktxrx .default()*+ 3disabledi2c@ff140000rockchip,rk3288-i2c >i2c5Mdefault, 3disabledi2c@ff150000rockchip,rk3288-i2c ?i2c5Odefault- 3disabledi2c@ff160000rockchip,rk3288-i2c @i2c5Pdefault. 3disabledi2c@ff170000rockchip,rk3288-i2c Ai2c5Qdefault/3okaybtserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 75MUbaudclkapb_pclktxrxdefault0 3disabledserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 85NVbaudclkapb_pclktxrxdefault1 3disabledserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 95OWbaudclkapb_pclkdefault23okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :5PXbaudclkapb_pclktxrxdefault3 3disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;5QYbaudclkapb_pclk  txrxdefault4 3disableddma-controller@ff250000arm,pl330arm,primecell%@*E5 apb_pclkbthermal-zonesreserve-thermal\r5cpu-thermal\dr5tripscpu_alert0ppassiveb6cpu_alert1$passiveb7cpu_crit_ criticalcooling-mapsmap060map170gpu-thermal\dr5tripsgpu_alert0ppassiveb8gpu_crit_ criticalcooling-mapsmap08 9tsadc@ff280000rockchip,rk3288-tsadc( %5HZtsadcapb_pclk 'tsadc-apbinitdefaultsleep:;:<s3okay  b5ethernet@ff290000rockchip,rk3288-gmac);macirqeth_wake_irq<85fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB 'stmmaceth3okayK[=rinputrgmii>default?@ A 'u00usb@ff500000 generic-ehciP 5Busb3okayusb@ff520000 generic-ohciR )5Busb 3disabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 5otghostC usb2-phy3okayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 5otgotg /@@ D usb2-phy3okayusb@ff5c0000 generic-ehci\ 5 3disableddma-controller@ff600000arm,pl330arm,primecell`@*E5 apb_pclk 3disabledi2c@ff650000rockchip,rk3288-i2ce <i2c5LdefaultE3okayact8846@5aactive-semi,act8846Z>VbFnGzFFFFregulatorsREG1VCC_DDROOREG2VCC_IO2Z2ZbREG3VDD_LOGB@B@REG4VCC_20bGREG5 VCCIO_SD2Z2ZbREG6 VDD10_LCDB@B@REG7 VCCA_CODEC2Z2ZREG8VCCA_TP2Z2ZREG9 VCCIO_PMU2Z2Zb>REG10VDD_10B@B@REG11VCC_18w@w@bREG12 VCC18_LCDw@w@syr827@40silergy,syr827@(,vdd_cpu PpD@YFb syr828@41silergy,syr828A(, Ppvdd_gpuD@YFbyrtc@51haoyu,hym8563Qxin32k&HdefaultIbi2c@ff660000rockchip,rk3288-i2cf =i2c5NdefaultJ3okayes8388@10everest,es8388everest,es8328dp|}5qbpwm@ff680000rockchip,rk3288-pwmhdefaultK5_ 3disabledpwm@ff680010rockchip,rk3288-pwmhdefaultL5_ 3disabledpwm@ff680020rockchip,rk3288-pwmh defaultM5_ 3disabledpwm@ff680030rockchip,rk3288-pwmh0defaultN5_ 3disabledsram@ff700000 mmio-sramppsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsbpower-controller!rockchip,rk3288-power-controllerKh[ bapower-domain@9 5chgfdehilkj$OPQRSTUVWpower-domain@11 5opXYpower-domain@12 5Zpower-domain@13 5[\reboot-modesyscon-reboot-modeRBRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv5 xin24m<HKjk$#gׄeрxhрxhbsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwb<edp-phyrockchip,rk3288-dp-phy5h24m 3disabledbqio-domains"rockchip,rk3288-io-voltage-domain3okay&0;I>W>euusbphyrockchip,rk3288-usb-phy3okayusb-phy@320 5]phyclk 'phy-resetbDusb-phy@33445^phyclk 'phy-reset]bBusb-phy@348H5_phyclk 'phy-resetbCwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt5p O3okaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif5T mclkhclk^tx 6default_<3okaybi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 55Ri2s_clki2s_hclk^^txrxdefault`3okaybcrypto@ff8a0000rockchip,rk3288-crypto@ 0 5}aclkhclksclkapb_pclk 'crypto-rstiommu@ff900800rockchip,iommu@ 5 aclkiface 3disablediommu@ff914000rockchip,iommu @P 5 aclkiface 3disabledrga@ff920000rockchip,rk3288-rga 5jaclkhclksclka ilm 'coreaxiahbvop@ff930000rockchip,rk3288-vop  5aclk_vopdclk_vophclk_vopa def 'axiahbdclk#b3okayportb endpoint@0*cbuendpoint@1*dbrendpoint@2*eblendpoint@3*fboiommu@ff930300rockchip,iommu 5 aclkifacea 3okaybbvop@ff940000rockchip,rk3288-vop  5aclk_vopdclk_vophclk_vopa  'axiahbdclk#g3okayportb endpoint@0*hbvendpoint@1*ibsendpoint@2*jbmendpoint@3*kbpiommu@ff940300rockchip,iommu 5 aclkifacea 3okaybgmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 5~d refpclka < 3disabledportsportendpoint@0*lbeendpoint@1*mbjlvds@ff96c000rockchip,rk3288-lvds@5g pclk_lvdslcdcna < 3disabledportsport@0endpoint@0*obfendpoint@1*pbkdp@ff970000rockchip,rk3288-dp@ b5icdppclkqdpo'dp< 3disabledportsport@0endpoint@0*rbdendpoint@1*sbihdmi@ff980000rockchip,rk3288-dw-hdmi< g5hmniahbisfrceca 3okay:tportsportendpoint@0*ubcendpoint@1*vbhvideo-codec@ff9a0000rockchip,rk3288-vpu   ;vepuvdpu5 aclkhclk#wa iommu@ff9a0800rockchip,iommu 5 aclkifacea bwiommu@ff9c0440rockchip,iommu @@@ o5 aclkiface 3disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ ;jobmmugpu5xa 3okayFyb9opp-table-1operating-points-v2bxopp-100000000u|~opp-200000000u |~opp-300000000u|B@opp-400000000uׄ|opp-600000000u#F|qos@ffaa0000rockchip,rk3288-qossyscon b[qos@ffaa0080rockchip,rk3288-qossyscon b\qos@ffad0000rockchip,rk3288-qossyscon bPqos@ffad0100rockchip,rk3288-qossyscon bQqos@ffad0180rockchip,rk3288-qossyscon bRqos@ffad0400rockchip,rk3288-qossyscon bSqos@ffad0480rockchip,rk3288-qossyscon bTqos@ffad0500rockchip,rk3288-qossyscon bOqos@ffad0800rockchip,rk3288-qossyscon bUqos@ffad0880rockchip,rk3288-qossyscon bVqos@ffad0900rockchip,rk3288-qossyscon bWqos@ffae0000rockchip,rk3288-qossyscon bZqos@ffaf0000rockchip,rk3288-qossyscon bXqos@ffaf0080rockchip,rk3288-qossyscon bYdma-controller@ffb20000arm,pl330arm,primecell@*E5 apb_pclkb^efuse@ffb40000rockchip,rk3288-efuse 5q pclk_efusecpu-id@7cpu_leakage@17interrupt-controller@ffc01000 arm,gic-400Rg@ @ `   bpinctrlrockchip,rk3288-pinctrl<gpio@ff750000rockchip,gpio-banku Q5@xRgbHgpio@ff780000rockchip,gpio-bankx R5AxRggpio@ff790000rockchip,gpio-banky S5BxRggpio@ff7a0000rockchip,gpio-bankz T5CxRgbgpio@ff7b0000rockchip,gpio-bank{ U5DxRgbAgpio@ff7c0000rockchip,gpio-bank| V5ExRggpio@ff7d0000rockchip,gpio-bank} W5FxRggpio@ff7e0000rockchip,gpio-bank~ X5GxRgbgpio@ff7f0000rockchip,gpio-bank Y5HxRgbhdmihdmi-cec-c0zhdmi-cec-c7zhdmi-ddc zzhdmi-ddc-unwedge {zpcfg-output-lowb{pcfg-pull-upb|pcfg-pull-downb}pcfg-pull-nonebzpcfg-pull-none-12ma b~suspendglobal-pwroffzddrio-pwroffzddr0-retention|ddr1-retention|edpedp-hpd }i2c0i2c0-xfer zzbEi2c1i2c1-xfer zzb,i2c2i2c2-xfer  z zbJi2c3i2c3-xfer zzb-i2c4i2c4-xfer zzb.i2c5i2c5-xfer zzb/i2s0i2s0-bus`zzzzzzb`lcdclcdc-ctl@zzzzbnsdmmcsdmmc-clkzb sdmmc-cmd|bsdmmc-cd|bsdmmc-bus1|sdmmc-bus4@||||bsdmmc-pwr zbsdio0sdio0-bus1|sdio0-bus4@||||bsdio0-cmd|bsdio0-clkzbsdio0-cd|sdio0-wp|sdio0-pwr|sdio0-bkpwr|sdio0-int|bsdio1sdio1-bus1|sdio1-bus4@||||sdio1-cd|sdio1-wp|sdio1-bkpwr|sdio1-int|sdio1-cmd|sdio1-clkzsdio1-pwr |emmcemmc-clkzbemmc-cmd|bemmc-pwr |emmc-bus1|emmc-bus4@||||emmc-bus8||||||||bemmc-reset zbspi0spi0-clk |b spi0-cs0 |b#spi0-tx|b!spi0-rx|b"spi0-cs1|spi1spi1-clk |b$spi1-cs0 |b'spi1-rx|b&spi1-tx|b%spi2spi2-cs1|spi2-clk|b(spi2-cs0|b+spi2-rx|b*spi2-tx |b)uart0uart0-xfer |zb0uart0-cts|uart0-rtszuart1uart1-xfer | zb1uart1-cts |uart1-rts zuart2uart2-xfer |zb2uart3uart3-xfer |zb3uart3-cts |uart3-rts zuart4uart4-xfer |zb4uart4-cts |uart4-rts ztsadcotp-pin zb:otp-out zb;pwm0pwm0-pinzbKpwm1pwm1-pinzbLpwm2pwm2-pinzbMpwm3pwm3-pinzbNgmacrgmii-pinszzzz~~~~zzz ~~zzb?rmii-pinszzzzzzzzzzphy-rstb@spdifspdif-tx zb_pcfg-output-highbirir-int|bkeyspwr-key|bpmicpmic-int|bIheadphonehp-detzbphone-ctl|busbhost-vbus-drvzbsatasata-pwr-en zbsdiowifi-enablezbmemory@0memoryemmc-pwrseqmmc-pwrseq-emmcdefault  bexternal-gmac-clock fixed-clocksY@ ext_gmacb=flash-regulatorregulator-fixed vcc_flashw@w@Ybvsys-regulatorregulator-fixedvcc_sysLK@LK@bFchosen serial2:115200n8adc-keys adc-keys  &buttons 7w@button-recovery QRecovery Wh bgpio-keys gpio-keyskey-power H QGPIO Power Wtdefault |gpio-leds gpio-ledsled-0  Qrock2:green:state1 heartbeatled-1 H  Qrock2:blue:state2 mmc0ir-receivergpio-ir-receiver defaultsoundsimple-audio-card SPDIFsimple-audio-card,dai-link@1cpu codec sata-prw-regulatorregulator-fixed  H default sata_pwrspdif-outlinux,spdif-ditbsound-i2srockchip,rk3288-hdmi-analogdefault     ,I2S ;AnalogLOUT2AnalogROUT2sdio-pwrseqmmc-pwrseq-simple5 ext_clockdefault Abvcc-host-regulatorregulator-fixed  Hdefault vcc_hostb]sdmmc-regulatorregulator-fixed  defaultvcc_sd2Z2ZYb #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclocksdynamic-power-coefficientcpu0-supplyphandleopp-sharedopp-hzopp-microvoltrangesclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendclock-namesportsmax-frequencyfifo-depthreset-namesstatusbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supplycap-sdio-irqmmc-pwrseqnon-removable#io-channel-cellsvref-supplydmasdma-namesreg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesassigned-clocksassigned-clock-parentsclock_in_outphy-modephy-supplysnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-usrx_delaytx_delayphysphy-namesdr_modesnps,reset-phy-on-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizesystem-power-controllerinl1-supplyinl2-supplyinl3-supplyvp1-supplyvp2-supplyvp3-supplyvp4-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onfcs,suspend-voltage-selectorregulator-boot-onregulator-enable-ramp-delayregulator-ramp-delayvin-supplyAVDD-supplyDVDD-supplyHPVDD-supply#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsaudio-supplybb-supplydvp-supplyflash0-supplyflash1-supplygpio30-supplygpio1830-supplylcdc-supplysdcard-supplywifi-supplyvbus-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointddc-i2c-busmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highreset-gpiosstartup-delay-usstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltlabellinux,codepress-threshold-microvoltwakeup-sourcelinux,default-triggersimple-audio-card,namesound-daienable-active-highrockchip,audio-codecrockchip,hp-det-gpiosrockchip,hp-en-gpiosrockchip,i2s-controllerrockchip,modelrockchip,routing