8(xmqmaker,miqirockchip,rk3288& 7mqmaker MiQialiases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/mmc@ff0f0000k/mmc@ff0c0000q/mmc@ff0d0000w/mmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12'@5<rV acpu@501cpuarm,cortex-a12'@5<rV acpu@502cpuarm,cortex-a12'@5<rV acpu@503cpuarm,cortex-a12'@5<rV aopp-table-0operating-points-v2iaopp-126000000t{ opp-216000000t { opp-312000000t{ opp-408000000tQ{ opp-600000000t#F{ opp-696000000t)|{~opp-816000000t0,{B@opp-1008000000t<{opp-1200000000tG{opp-1416000000tTfr{Oopp-1512000000tZJ{ opp-1608000000t_"{preserved-memorydma-unusable@fe000000oscillator fixed-clockn6xin24ma timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 5a  pclktimerdisplay-subsystemrockchip,display-subsystem mmc@ff0c0000rockchip,rk3288-dw-mshc р 5Drvbiuciuciu-driveciu-sample  @&reset2okay9CUfxdefault mmc@ff0d0000rockchip,rk3288-dw-mshc р 5Eswbiuciuciu-driveciu-sample ! @&reset 2disabledmmc@ff0e0000rockchip,rk3288-dw-mshc р 5Ftxbiuciuciu-driveciu-sample "@&reset 2disabledmmc@ff0f0000rockchip,rk3288-dw-mshc р 5Guybiuciuciu-driveciu-sample #@&reset2okay9Cdefaultsaradc@ff100000rockchip,saradc $5I[saradcapb_pclkW &saradc-apb2okayspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi5ARspiclkapb_pclk  txrx ,default 2disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi5BSspiclkapb_pclk txrx -default !" 2disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi5CTspiclkapb_pclktxrx .default#$%& 2disabledi2c@ff140000rockchip,rk3288-i2c >i2c5Mdefault'2okayi2c@ff150000rockchip,rk3288-i2c ?i2c5Odefault( 2disabledi2c@ff160000rockchip,rk3288-i2c @i2c5Pdefault)2okayi2c@ff170000rockchip,rk3288-i2c Ai2c5Qdefault*2okayapserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 75MUbaudclkapb_pclktxrxdefault+ 2disabledserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 85NVbaudclkapb_pclktxrxdefault, 2disabledserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 95OWbaudclkapb_pclkdefault-2okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :5PXbaudclkapb_pclktxrxdefault.2okayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;5QYbaudclkapb_pclk  txrxdefault/ 2disableddma-controller@ff250000arm,pl330arm,primecell%@,5 apb_pclkathermal-zonesreserve-thermalCYg0cpu-thermalCdYg0tripscpu_alert0wppassivea1cpu_alert1w$passivea2cpu_critw_ criticalcooling-mapsmap010map120gpu-thermalCdYg0tripsgpu_alert0wppassivea3gpu_critw_ criticalcooling-mapsmap03 4tsadc@ff280000rockchip,rk3288-tsadc( %5HZtsadcapb_pclk &tsadc-apbinitdefaultsleep5657s2okaya0ethernet@ff290000rockchip,rk3288-gmac)"macirqeth_wake_irq785fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB &stmmaceth2okay2B8Yinputdefault9:;<f=qrgmiiz 'B@ >0usb@ff500000 generic-ehciP 5?usb 2disabledusb@ff520000 generic-ohciR )5?usb 2disabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 5otghost@ usb2-phy2okayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 5otg peripheral@@ A usb2-phy2okayusb@ff5c0000 generic-ehci\ 5 2disableddma-controller@ff600000arm,pl330arm,primecell`@,5 apb_pclk 2disabledi2c@ff650000rockchip,rk3288-i2ce <i2c5LdefaultB2okaysyr827@40silergy,syr827%@Bvdd_cpuQ Pip,@Ca syr828@41silergy,syr828%ABvdd_gpuQ PipCaurtc@51haoyu,hym8563Qxin32kact8846@5aactive-semi,act8846ZdefaultDCCCC'C3C?EregulatorsREG1Bvcc_ddrREG2Bvcc_ioQ2Zi2ZaREG3Bvdd_logQiREG4Bvcc_20QiaEREG5 Bvccio_sdQ2Zi2ZaREG6 Bvdd10_lcdQB@iB@REG7Bvcca_18Qw@iw@REG8Bvcca_33Q2Zi2ZaYREG9Bvcc_lanQ2Zi2Za=REG10Bvdd_10QB@iB@REG11Bvcc_18Qw@iw@aREG12 Bvcc18_lcdQw@iw@i2c@ff660000rockchip,rk3288-i2cf =i2c5NdefaultF2okaypwm@ff680000rockchip,rk3288-pwmhKdefaultG5_ 2disabledpwm@ff680010rockchip,rk3288-pwmhKdefaultH5_ 2disabledpwm@ff680020rockchip,rk3288-pwmh KdefaultI5_ 2disabledpwm@ff680030rockchip,rk3288-pwmh0KdefaultJ5_ 2disabledsram@ff700000 mmio-sramppsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsapower-controller!rockchip,rk3288-power-controllerV2hB a]power-domain@9 5chgfdehilkj$jKLMNOPQRSVpower-domain@11 5opjTUVpower-domain@12 5jVVpower-domain@13 5jWXVreboot-modesyscon-reboot-modeqxRBRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv5 xin24m7H2jk$#gׄeрxhрxhasyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwa7edp-phyrockchip,rk3288-dp-phy5h24m 2disabledamio-domains"rockchip,rk3288-io-voltage-domain2okayY=".<usbphyrockchip,rk3288-usb-phy2okayusb-phy@320 5]phyclk &phy-resetaAusb-phy@33445^phyclk &phy-reseta?usb-phy@348H5_phyclk &phy-reseta@watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt5p O2okaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdifH5T mclkhclkZtx 6default[7 2disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2sH 55Ri2s_clki2s_hclkZZtxrxdefault\Yt 2disabledcrypto@ff8a0000rockchip,rk3288-crypto@ 0 5}aclkhclksclkapb_pclk &crypto-rstiommu@ff900800rockchip,iommu@ 5 aclkiface 2disablediommu@ff914000rockchip,iommu @P 5 aclkiface 2disabledrga@ff920000rockchip,rk3288-rga 5jaclkhclksclk] ilm &coreaxiahbvop@ff930000rockchip,rk3288-vop  5aclk_vopdclk_vophclk_vop] def &axiahbdclk^2okayporta endpoint@0_aqendpoint@1`anendpoint@2aahendpoint@3bakiommu@ff930300rockchip,iommu 5 aclkiface] 2okaya^vop@ff940000rockchip,rk3288-vop  5aclk_vopdclk_vophclk_vop]  &axiahbdclkc2okayporta endpoint@0darendpoint@1eaoendpoint@2faiendpoint@3galiommu@ff940300rockchip,iommu 5 aclkiface] 2okayacmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 5~d refpclk] 7 2disabledportsportendpoint@0haaendpoint@1iaflvds@ff96c000rockchip,rk3288-lvds@5g pclk_lvdslcdcj] 7 2disabledportsport@0endpoint@0kabendpoint@1lagdp@ff970000rockchip,rk3288-dp@ b5icdppclkmdpo&dp7 2disabledportsport@0endpoint@0na`endpoint@1oaehdmi@ff980000rockchip,rk3288-dw-hdmiH7 g5hmniahbisfrcec] 2okaypportsportendpoint@0qa_endpoint@1radvideo-codec@ff9a0000rockchip,rk3288-vpu   "vepuvdpu5 aclkhclks] iommu@ff9a0800rockchip,iommu 5 aclkiface] asiommu@ff9c0440rockchip,iommu @@@ o5 aclkiface 2disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ "jobmmugpu5t] 2okayua4opp-table-1operating-points-v2atopp-100000000t{~opp-200000000t {~opp-300000000t{B@opp-400000000tׄ{opp-600000000t#F{qos@ffaa0000rockchip,rk3288-qossyscon aWqos@ffaa0080rockchip,rk3288-qossyscon aXqos@ffad0000rockchip,rk3288-qossyscon aLqos@ffad0100rockchip,rk3288-qossyscon aMqos@ffad0180rockchip,rk3288-qossyscon aNqos@ffad0400rockchip,rk3288-qossyscon aOqos@ffad0480rockchip,rk3288-qossyscon aPqos@ffad0500rockchip,rk3288-qossyscon aKqos@ffad0800rockchip,rk3288-qossyscon aQqos@ffad0880rockchip,rk3288-qossyscon aRqos@ffad0900rockchip,rk3288-qossyscon aSqos@ffae0000rockchip,rk3288-qossyscon aVqos@ffaf0000rockchip,rk3288-qossyscon aTqos@ffaf0080rockchip,rk3288-qossyscon aUdma-controller@ffb20000arm,pl330arm,primecell@,5 apb_pclkaZefuse@ffb40000rockchip,rk3288-efuse 5q pclk_efusecpu-id@7cpu_leakage@17interrupt-controller@ffc01000 arm,gic-400@ @ `   apinctrlrockchip,rk3288-pinctrl7gpio@ff750000rockchip,gpio-banku Q5@)a~gpio@ff780000rockchip,gpio-bankx R5A)gpio@ff790000rockchip,gpio-banky S5B)gpio@ff7a0000rockchip,gpio-bankz T5C)gpio@ff7b0000rockchip,gpio-bank{ U5D)a>gpio@ff7c0000rockchip,gpio-bank| V5E)gpio@ff7d0000rockchip,gpio-bank} W5F)gpio@ff7e0000rockchip,gpio-bank~ X5G)a}gpio@ff7f0000rockchip,gpio-bank Y5H)hdmihdmi-cec-c05vhdmi-cec-c75vhdmi-ddc 5vvhdmi-ddc-unwedge 5wvpcfg-output-lowCawpcfg-pull-upNaxpcfg-pull-down[aypcfg-pull-nonejavpcfg-pull-none-12majw azsuspendglobal-pwroff5vddrio-pwroff5vddr0-retention5xddr1-retention5xedpedp-hpd5 yi2c0i2c0-xfer 5vvaBi2c1i2c1-xfer 5vva'i2c2i2c2-xfer 5 v vaFi2c3i2c3-xfer 5vva(i2c4i2c4-xfer 5vva)i2c5i2c5-xfer 5vva*i2s0i2s0-bus`5vvvvvva\lcdclcdc-ctl@5vvvvajsdmmcsdmmc-clk5za sdmmc-cmd5{asdmmc-cd5xasdmmc-bus15xsdmmc-bus4@5{{{{asdmmc-pwr5 vasdio0sdio0-bus15xsdio0-bus4@5xxxxsdio0-cmd5xsdio0-clk5vsdio0-cd5xsdio0-wp5xsdio0-pwr5xsdio0-bkpwr5xsdio0-int5xsdio1sdio1-bus15xsdio1-bus4@5xxxxsdio1-cd5xsdio1-wp5xsdio1-bkpwr5xsdio1-int5xsdio1-cmd5xsdio1-clk5vsdio1-pwr5 xemmcemmc-clk5vaemmc-cmd5xaemmc-pwr5 xaemmc-bus15xemmc-bus4@5xxxxemmc-bus85xxxxxxxxaspi0spi0-clk5 xaspi0-cs05 xaspi0-tx5xaspi0-rx5xaspi0-cs15xspi1spi1-clk5 xaspi1-cs05 xa"spi1-rx5xa!spi1-tx5xa spi2spi2-cs15xspi2-clk5xa#spi2-cs05xa&spi2-rx5xa%spi2-tx5 xa$uart0uart0-xfer 5xva+uart0-cts5xuart0-rts5vuart1uart1-xfer 5x va,uart1-cts5 xuart1-rts5 vuart2uart2-xfer 5xva-uart3uart3-xfer 5xva.uart3-cts5 xuart3-rts5 vuart4uart4-xfer 5xva/uart4-cts5 xuart4-rts5 vtsadcotp-pin5 va5otp-out5 va6pwm0pwm0-pin5vaGpwm1pwm1-pin5vaHpwm2pwm2-pin5vaIpwm3pwm3-pin5vaJgmacrgmii-pins5vvvvzzzzvvv zzvva9rmii-pins5vvvvvvvvvvphy-int5 xa<phy-pmeb5xa;phy-rst5|a:spdifspdif-tx5 va[pcfg-output-higha|pcfg-pull-up-drv-12maNw a{act8846pmic-int5xpmic-sleep5wpmic-vsel5waDusb_hosthost-vbus-drv5vachosenserial2:115200n8memory@0memoryexternal-gmac-clock fixed-clocksY@ ext_gmaca8leds gpio-ledsled-0 }miqi:green:usertimerflash-regulatorregulator-fixed Bvcc_flashQw@iw@ausb-host-regulatorregulator-fixed ~default Bvcc_hostQLK@iLK@Csdmmc-regulatorregulator-fixed } defaultBvcc_sdQ2Zi2Zavsys-regulatorregulator-fixedBvcc_sysQLK@iLK@aC #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclocksdynamic-power-coefficientcpu-supplyphandleopp-sharedopp-hzopp-microvoltrangesclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendclock-namesportsmax-frequencyfifo-depthreset-namesstatusbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supplynon-removable#io-channel-cellsvref-supplydmasdma-namesreg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delayphysphy-namesdr_modesnps,reset-phy-on-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizefcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-enable-ramp-delayregulator-ramp-delayvin-supplysystem-power-controllervp1-supplyvp2-supplyvp3-supplyvp4-supplyinl1-supplyinl2-supplyinl3-supply#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsaudio-supplyflash0-supplyflash1-supplygpio30-supplygpio1830-supplylcdc-supplysdcard-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointddc-i2c-busmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highstdout-pathgpioslabellinux,default-triggerenable-active-highstartup-delay-us