p8e( eti,omap4430ti,omap4 +chosenB7/ocp/interconnect@48000000/segment@0/target-module@20000/serial@0aliases?C/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0?H/ocp/interconnect@48000000/segment@0/target-module@72000/i2c@0?M/ocp/interconnect@48000000/segment@0/target-module@60000/i2c@0ER/ocp/interconnect@48000000/segment@200000/target-module@150000/i2c@0?W/ocp/interconnect@48000000/segment@0/target-module@9c000/mmc@0?\/ocp/interconnect@48000000/segment@0/target-module@b4000/mmc@0?a/ocp/interconnect@48000000/segment@0/target-module@ad000/mmc@0?f/ocp/interconnect@48000000/segment@0/target-module@d1000/mmc@0?k/ocp/interconnect@48000000/segment@0/target-module@d5000/mmc@0Bp/ocp/interconnect@48000000/segment@0/target-module@6a000/serial@0Bx/ocp/interconnect@48000000/segment@0/target-module@6c000/serial@0B/ocp/interconnect@48000000/segment@0/target-module@20000/serial@0B/ocp/interconnect@48000000/segment@0/target-module@6e000/serial@0 /ocp/dsp/ocp/ipu@55020000 /connector0 /connector1_/ocp/interconnect@4a000000/segment@0/target-module@64000/usbhshost@0/ehci@c00/hub@1/ethernet@1cpus+cpu@0arm,cortex-a9cpucpu  'O 5a cpu@1arm,cortex-a9cpusram@40304000 mmio-sram@0@interrupt-controller@48241000arm,cortex-a9-gic#8H$H$ cache-controller@48242000arm,pl310-cacheH$ IWlocal-timer@48240600arm,cortex-a9-twd-timerH$  c  interrupt-controller@48281000ti,omap4-wugen-mpu#8H( ocpsimple-pm-busn$ +|l3-noc@44000000ti,omap4-l3-nocDD Ec  interconnect@4a300000ti,omap4-l4-wkupsimple-pm-busn  fckJ0J0J0 aplaia0+$|J0J1J2segment@0simple-pm-bus+|`` @@PPtarget-module@4000ti,sysc-omap2ti,sysc@@ revsysc 0fck+ |@counter@0ti,omap-counter32k target-module@6000ti,sysc-omap4ti,sysc`rev+ |` prm@0ti,omap4-prmsimple-bus  c + | clocks+sys_clkin_ck@110 ti,mux-clock sys_clkin_ck abe_dpll_bypass_clk_mux_ck@108 ti,mux-clockabe_dpll_bypass_clk_mux_ck9abe_dpll_refclk_mux_ck@10c ti,mux-clockabe_dpll_refclk_mux_ck 8dbgclk_mux_ckfixed-factor-clockdbgclk_mux_ckl4_wkup_clk_mux_ck@108 ti,mux-clockl4_wkup_clk_mux_cksyc_clk_div_ck@100ti,divider-clocksyc_clk_div_ckusim_ck@1858ti,divider-clockusim_ckXusim_fclk@1858ti,gate-clock usim_fclkXtrace_clk_div_ckti,clkdm-gate-clocktrace_clk_div_ck bandgap_fclk@1888ti,gate-clock bandgap_fclkclockdomainsemu_sys_clkdmti,clockdomainemu_sys_clkdml4_wkup_cm@1800 ti,omap4-cm l4_wkup_cm+ |clk@20 ti,clkctrll4_wkup_clkctrl \ emu_sys_cm@1a00 ti,omap4-cm emu_sys_cm+ |clk@20 ti,clkctrlemu_sys_clkctrl prm@300#ti,omap4-prm-instti,omap-prm-inst prm@400#ti,omap4-prm-instti,omap-prm-inst dprm@500#ti,omap4-prm-instti,omap-prm-inst prm@600#ti,omap4-prm-instti,omap-prm-inst prm@700#ti,omap4-prm-instti,omap-prm-inst 4prm@f00#ti,omap4-prm-instti,omap-prm-inst prm@1000#ti,omap4-prm-instti,omap-prm-inst prm@1100#ti,omap4-prm-instti,omap-prm-inst@ prm@1200#ti,omap4-prm-instti,omap-prm-inst prm@1300#ti,omap4-prm-instti,omap-prm-inst prm@1400#ti,omap4-prm-instti,omap-prm-inst prm@1600#ti,omap4-prm-instti,omap-prm-inst prm@1700#ti,omap4-prm-instti,omap-prm-inst  prm@1900#ti,omap4-prm-instti,omap-prm-inst prm@1b00#ti,omap4-prm-instti,omap-prm-inst@target-module@a000ti,sysc-omap4ti,syscrev+ |scrm@0ti,omap4-scrm clocks+auxclk0_src_gate_ck@310 ti,composite-no-wait-gate-clockauxclk0_src_gate_ckauxclk0_src_mux_ck@310ti,composite-mux-clockauxclk0_src_mux_ck auxclk0_src_ckti,composite-clockauxclk0_src_ckauxclk0_ck@310ti,divider-clock auxclk0_ck.auxclk1_src_gate_ck@314 ti,composite-no-wait-gate-clockauxclk1_src_gate_ckauxclk1_src_mux_ck@314ti,composite-mux-clockauxclk1_src_mux_ck  auxclk1_src_ckti,composite-clockauxclk1_src_ck !auxclk1_ck@314ti,divider-clock auxclk1_ck!/auxclk2_src_gate_ck@318 ti,composite-no-wait-gate-clockauxclk2_src_gate_ck"auxclk2_src_mux_ck@318ti,composite-mux-clockauxclk2_src_mux_ck #auxclk2_src_ckti,composite-clockauxclk2_src_ck"#$auxclk2_ck@318ti,divider-clock auxclk2_ck$0auxclk3_src_gate_ck@31c ti,composite-no-wait-gate-clockauxclk3_src_gate_ck%auxclk3_src_mux_ck@31cti,composite-mux-clockauxclk3_src_mux_ck &auxclk3_src_ckti,composite-clockauxclk3_src_ck%&'auxclk3_ck@31cti,divider-clock auxclk3_ck'1auxclk4_src_gate_ck@320 ti,composite-no-wait-gate-clockauxclk4_src_gate_ck (auxclk4_src_mux_ck@320ti,composite-mux-clockauxclk4_src_mux_ck  )auxclk4_src_ckti,composite-clockauxclk4_src_ck()*auxclk4_ck@320ti,divider-clock auxclk4_ck* 2auxclk5_src_gate_ck@324 ti,composite-no-wait-gate-clockauxclk5_src_gate_ck$+auxclk5_src_mux_ck@324ti,composite-mux-clockauxclk5_src_mux_ck $,auxclk5_src_ckti,composite-clockauxclk5_src_ck+,-auxclk5_ck@324ti,divider-clock auxclk5_ck-$3auxclkreq0_ck@210 ti,mux-clockauxclkreq0_ck./0123auxclkreq1_ck@214 ti,mux-clockauxclkreq1_ck./0123auxclkreq2_ck@218 ti,mux-clockauxclkreq2_ck./0123auxclkreq3_ck@21c ti,mux-clockauxclkreq3_ck./0123auxclkreq4_ck@220 ti,mux-clockauxclkreq4_ck./0123 auxclkreq5_ck@224 ti,mux-clockauxclkreq5_ck./0123$clockdomainstarget-module@c000ti,sysc-omap4ti,sysc revsysc+ |scm@c000ti,omap4-scm-wkupsegment@10000simple-pm-bus+x|@@PPtarget-module@0ti,sysc-omap2ti,syscrevsyscsyss,9   fckdbclk+ |gpio@0ti,omap4-gpio cFXh#8target-module@4000ti,sysc-omap2ti,sysc@@@revsyscsyss,"9 fck+ |@wdt@0ti,omap4-wdtti,omap3-wdt cPtarget-module@8000ti,sysc-omap2-timerti,syscrevsyscsyss,' 9 fck+ |ttimer@0ti,omap3430-timer fcktimer_sys_ck c%  target-module@c000ti,sysc-omap2ti,syscrevsyscsyss,' 9 Xfck+ |keypad@0ti,omap4-keypad cxmputarget-module@e000ti,sysc-omap4ti,sysc revsysc+ |pinmux@40 ti,omap4-padconfpinctrl-single@8+8#pinmux_leds_wkpinspinmux_twl6030_wkup_pinswsegment@20000simple-pm-bus+|``  00@@PPpptarget-module@0ti,sysc 'disabled+ |target-module@2000ti,sysc 'disabled+ | target-module@4000ti,sysc 'disabled+ |@target-module@6000ti,sysc 'disabled+0|`p 0interconnect@4a000000ti,omap4-l4-cfgsimple-pm-busn4 5fckJJJ aplaia0+T|JJJJ J (J(0J0segment@0simple-pm-bus+| 00@@PP``pp@  00 ``pp @@PPtarget-module@2000ti,sysc-omap4ti,sysc   revsysc+ | scm@0ti,omap4-scm-coresimple-bus+ |scm_conf@0syscon+control-phy@300ti,control-phy-usb2powergcontrol-phy@33cti,control-phy-otghs<otghs_controlftarget-module@4000ti,sysc-omap4ti,sysc@rev+ |@cm1@0ti,omap4-cm1simple-bus + | clocks+extalt_clkin_ck fixed-clockextalt_clkin_ck.Dpad_clks_src_ck fixed-clockpad_clks_src_ck.6pad_clks_ck@108ti,gate-clock pad_clks_ck6pad_slimbus_core_clks_ck fixed-clockpad_slimbus_core_clks_ck.secure_32k_clk_src_ck fixed-clocksecure_32k_clk_src_ck.slimbus_src_clk fixed-clockslimbus_src_clk.7slimbus_clk@108ti,gate-clock slimbus_clk7 sys_32k_ck fixed-clock sys_32k_ck.virt_12000000_ck fixed-clockvirt_12000000_ck. virt_13000000_ck fixed-clockvirt_13000000_ck.]@ virt_16800000_ck fixed-clockvirt_16800000_ck.Yvirt_19200000_ck fixed-clockvirt_19200000_ck.$virt_26000000_ck fixed-clockvirt_26000000_ck.virt_27000000_ck fixed-clockvirt_27000000_ck.virt_38400000_ck fixed-clockvirt_38400000_ck.Itie_low_clock_ck fixed-clocktie_low_clock_ck.utmi_phy_clkout_ck fixed-clockutmi_phy_clkout_ck.xclk60mhsp1_ck fixed-clockxclk60mhsp1_ck.`xclk60mhsp2_ck fixed-clockxclk60mhsp2_ck.axclk60motg_ck fixed-clockxclk60motg_ck.dpll_abe_ck@1e0ti,omap4-dpll-m4xen-clock dpll_abe_ck89:dpll_abe_x2_ck@1f0ti,omap4-dpll-x2-clockdpll_abe_x2_ck:;dpll_abe_m2x2_ck@1f0ti,divider-clockdpll_abe_m2x2_ck;>P<abe_24m_fclkfixed-factor-clock abe_24m_fclk<abe_clk@108ti,divider-clockabe_clk<gdpll_abe_m3x2_ck@1f4ti,divider-clockdpll_abe_m3x2_ck;>P=core_hsd_byp_clk_mux_ck@12c ti,mux-clockcore_hsd_byp_clk_mux_ck=,>dpll_core_ck@120ti,omap4-dpll-core-clock dpll_core_ck> $,(?dpll_core_x2_ckti,omap4-dpll-x2-clockdpll_core_x2_ck?@dpll_core_m6x2_ck@140ti,divider-clockdpll_core_m6x2_ck@>@Pdpll_core_m2_ck@130ti,divider-clockdpll_core_m2_ck?>0PAddrphy_ckfixed-factor-clock ddrphy_ckAdpll_core_m5x2_ck@13cti,divider-clockdpll_core_m5x2_ck@><PBdiv_core_ck@100ti,divider-clock div_core_ckBMdiv_iva_hs_clk@1dcti,divider-clockdiv_iva_hs_clkBgFdiv_mpu_hs_clk@19cti,divider-clockdiv_mpu_hs_clkBgLdpll_core_m4x2_ck@138ti,divider-clockdpll_core_m4x2_ck@>8PCdll_clk_div_ckfixed-factor-clockdll_clk_div_ckCdpll_abe_m2_ck@1f0ti,divider-clockdpll_abe_m2_ck:Pdpll_core_m3x2_gate_ck@134 ti,composite-no-wait-gate-clockdpll_core_m3x2_gate_ck@4Ddpll_core_m3x2_div_ck@134ti,composite-divider-clockdpll_core_m3x2_div_ck@4Edpll_core_m3x2_ckti,composite-clockdpll_core_m3x2_ckDEdpll_core_m7x2_ck@144ti,divider-clockdpll_core_m7x2_ck@>DPiva_hsd_byp_clk_mux_ck@1ac ti,mux-clockiva_hsd_byp_clk_mux_ckFGdpll_iva_ck@1a0ti,omap4-dpll-clock dpll_iva_ckGH}7Hdpll_iva_x2_ckti,omap4-dpll-x2-clockdpll_iva_x2_ckHIdpll_iva_m4x2_ck@1b8ti,divider-clockdpll_iva_m4x2_ckI>PJ}~Jdpll_iva_m5x2_ck@1bcti,divider-clockdpll_iva_m5x2_ckI>PK}] Kdpll_mpu_ck@160ti,omap4-dpll-clock dpll_mpu_ckL`dlhdpll_mpu_m2_ck@170ti,divider-clockdpll_mpu_m2_ck>pPper_hs_clk_div_ckfixed-factor-clockper_hs_clk_div_ck=Qusb_hs_clk_div_ckfixed-factor-clockusb_hs_clk_div_ck=Wl3_div_ck@100ti,divider-clock l3_div_ckMNl4_div_ck@100ti,divider-clock l4_div_ckNlp_clk_div_ckfixed-factor-clocklp_clk_div_ck<mpu_periphclkfixed-factor-clockmpu_periphclkocp_abe_iclk@528ti,divider-clock ocp_abe_iclk O(per_abe_24m_fclkfixed-factor-clockper_abe_24m_fclkPdummy_ck fixed-clock dummy_ck.clockdomainsmpuss_cm@300 ti,omap4-cm mpuss_cm+ |clk@20 ti,clkctrlmpuss_clkctrl tesla_cm@400 ti,omap4-cm tesla_cm+ |clk@20 ti,clkctrltesla_clkctrl cabe_cm@500 ti,omap4-cmabe_cm+ |clk@20 ti,clkctrl abe_clkctrl lOtarget-module@8000ti,sysc-omap4ti,syscrev+ | cm2@0ti,omap4-cm2simple-bus + | clocks+per_hsd_byp_clk_mux_ck@14c ti,mux-clockper_hsd_byp_clk_mux_ckQLRdpll_per_ck@140ti,omap4-dpll-clock dpll_per_ckR@DLHSdpll_per_m2_ck@150ti,divider-clockdpll_per_m2_ckSP[dpll_per_x2_ck@150ti,omap4-dpll-x2-clockdpll_per_x2_ckSPTdpll_per_m2x2_ck@150ti,divider-clockdpll_per_m2x2_ckT>PPZdpll_per_m3x2_gate_ck@154 ti,composite-no-wait-gate-clockdpll_per_m3x2_gate_ckTTUdpll_per_m3x2_div_ck@154ti,composite-divider-clockdpll_per_m3x2_div_ckTTVdpll_per_m3x2_ckti,composite-clockdpll_per_m3x2_ckUVdpll_per_m4x2_ck@158ti,divider-clockdpll_per_m4x2_ckT>XPdpll_per_m5x2_ck@15cti,divider-clockdpll_per_m5x2_ckT>\Pdpll_per_m6x2_ck@160ti,divider-clockdpll_per_m6x2_ckT>`PYdpll_per_m7x2_ck@164ti,divider-clockdpll_per_m7x2_ckT>dPdpll_usb_ck@180ti,omap4-dpll-j-type-clock dpll_usb_ckWXdpll_usb_clkdcoldo_ck@1b4ti,fixed-factor-clockdpll_usb_clkdcoldo_ckX>Pdpll_usb_m2_ck@190ti,divider-clockdpll_usb_m2_ckX>P\ducati_clk_mux_ck@100 ti,mux-clockducati_clk_mux_ckMYfunc_12m_fclkfixed-factor-clockfunc_12m_fclkZfunc_24m_clkfixed-factor-clock func_24m_clk[func_24mc_fclkfixed-factor-clockfunc_24mc_fclkZfunc_48m_fclk@108ti,divider-clockfunc_48m_fclkZfunc_48mc_fclkfixed-factor-clockfunc_48mc_fclkZfunc_64m_fclk@108ti,divider-clockfunc_64m_fclkfunc_96m_fclk@108ti,divider-clockfunc_96m_fclkZinit_60m_fclk@104ti,divider-clockinit_60m_fclk\_per_abe_nc_fclk@108ti,divider-clockper_abe_nc_fclkPusb_phy_cm_clk32k@640ti,gate-clockusb_phy_cm_clk32k@hclockdomainsl3_init_clkdmti,clockdomainl3_init_clkdmXl4_ao_cm@600 ti,omap4-cm l4_ao_cm+ |clk@20 ti,clkctrll4_ao_clkctrl jl3_1_cm@700 ti,omap4-cml3_1_cm+ |clk@20 ti,clkctrl l3_1_clkctrl l3_2_cm@800 ti,omap4-cml3_2_cm+ |clk@20 ti,clkctrl l3_2_clkctrl ducati_cm@900 ti,omap4-cm ducati_cm + | clk@20 ti,clkctrlducati_clkctrl l3_dma_cm@a00 ti,omap4-cm l3_dma_cm + | clk@20 ti,clkctrll3_dma_clkctrl ]l3_emif_cm@b00 ti,omap4-cm l3_emif_cm + | clk@20 ti,clkctrll3_emif_clkctrl d2d_cm@c00 ti,omap4-cmd2d_cm + | clk@20 ti,clkctrl d2d_clkctrl il4_cfg_cm@d00 ti,omap4-cm l4_cfg_cm + | clk@20 ti,clkctrll4_cfg_clkctrl 5l3_instr_cm@e00 ti,omap4-cm l3_instr_cm+ |clk@20 ti,clkctrll3_instr_clkctrl $ ivahd_cm@f00 ti,omap4-cm ivahd_cm+ |clk@20 ti,clkctrlivahd_clkctrl iss_cm@1000 ti,omap4-cmiss_cm+ |clk@20 ti,clkctrl iss_clkctrl ql3_dss_cm@1100 ti,omap4-cm l3_dss_cm+ |clk@20 ti,clkctrll3_dss_clkctrl l3_gfx_cm@1200 ti,omap4-cm l3_gfx_cm+ |clk@20 ti,clkctrll3_gfx_clkctrl l3_init_cm@1300 ti,omap4-cm l3_init_cm+ |clk@20 ti,clkctrll3_init_clkctrl ^clock@1400 ti,omap4-cm l4_per_cm+ |clock@20 ti,clkctrll4_per_clkctrl Drclock@1a0 ti,clkctrll4_secure_clkctrl<~target-module@56000ti,sysc-omap2ti,sysc``,`(revsyscsyss,#  9 ]fck+ |`dma-controller@0ti,omap4430-sdmati,omap-sdma0c   target-module@58000ti,sysc-omap2ti,syscrevsyscsyss,#9 ^fck+ |Phsi@0 ti,omap4-hsi@Psysgdd ^hsi_fck cGgdd_mpu+ |@hsi-port@2000ti,omap4-hsi-port (txrx cChsi-port@3000ti,omap4-hsi-port08txrx cDtarget-module@5e000ti,sysc 'disabled+ | target-module@62000ti,sysc-omap2ti,sysc   revsyscsyss,  ^Hfck+ | usbhstll@0 ti,usbhs-tll cNtarget-module@64000ti,sysc-omap4ti,sysc@@@revsyscsyss, ^8fck+ |@usbhshost@0ti,usbhs-host+ | _`a3refclk_60m_intrefclk_60m_ext_p1refclk_60m_ext_p2 ehci-phyohci@800ti,ohci-omap3 cLehci@c00 ti,ehci-omap  cMb+hub@1 usb424,9514+ethernet@1 usb424,ec00target-module@66000ti,sysc-omap2ti,sysc```revsyscsyss,  cfcknddrstctrl+ |`mmu@0ti,omap4-iommu c+segment@80000simple-pm-bus+|      @@PP``pp` `p p        target-module@29000ti,sysc 'disabled+ |target-module@2b000ti,sysc-omap2ti,syscrevsyscsyss, 9 ^@fck+ |usb_otg_hs@0ti,omap4-musbc\]mcdma8ee @usb2-phyJU] ffr2target-module@2d000ti,sysc-omap2ti,syscrevsyscsyss, 9 ^fck+ |ocp2scp@0ti,omap-ocp2scp+ |usb2phy@80 ti,omap-usb2Xfghwkupclketarget-module@36000ti,sysc-omap2ti,sysc```revsyscsyss,9 ifck+ |`target-module@4d000ti,sysc-omap2ti,syscrevsyscsyss,9 ifck+ |target-module@59000ti,sysc-omap4-srti,sysc8sysc, jfck+ |smartreflex@0ti,omap4-smartreflex-mpu ctarget-module@5b000ti,sysc-omap4-srti,sysc8sysc, jfck+ |smartreflex@0ti,omap4-smartreflex-iva cftarget-module@5d000ti,sysc-omap4-srti,sysc8sysc, jfck+ |smartreflex@0ti,omap4-smartreflex-core ctarget-module@60000ti,sysc 'disabled+ |target-module@74000ti,sysc-omap4ti,sysc@@ revsysc,  5fck+ |@mailbox@0ti,omap4-mailbox cmbox-ipu  mbox-dsp  target-module@76000ti,sysc-omap2ti,sysc```revsyscsyss, 9 5fck+ |`spinlock@0ti,omap4-hwspinlocksegment@100000simple-pm-bus+`|  00target-module@0ti,sysc-omap4ti,sysc revsysc+ |pinmux@40 ti,omap4-padconfpinctrl-single@+8#defaultklmnospinmux_mcpdm_pins(pinmux_twl6040_pins`ypinmux_mcbsp1_pins pinmux_dss_dpi_pins"$&(*,.0246tvxz|~kpinmux_tfp410_pinsDlpinmux_dss_hdmi_pinsZ\^mpinmux_tpd12s015_pins"HX npinmux_hsusbb1_pins`           opinmux_i2c1_pinsupinmux_i2c2_pins}pinmux_i2c3_pinstpinmux_i2c4_pinspinmux_wl12xx_gpio &,02pinmux_wl12xx_pins@8:  pinmux_button_pinspinmux_twl6030_pins^Avomap4_padconf_global@5a0sysconsimple-busp+ |pppbias_regulator@60ti,pbias-omap4ti,pbias-omap`ppbias_mmc_omap4pbias_mmc_omap4w@,-target-module@2000ti,sysc 'disabled+ | target-module@8000ti,sysc 'disabled+ |target-module@a000ti,sysc-omap4ti,sysc revsysc,  D qfck+ |segment@180000simple-pm-bus+segment@200000simple-pm-bus+h|!!  @ @P P` `p p ! 0!0  !!`!`p!p@!@P!P!!""`"`p"p""""!!target-module@4000ti,sysc 'disabled+ |@target-module@6000ti,sysc 'disabled+ |`target-module@a000ti,sysc 'disabled+ |target-module@c000ti,sysc 'disabled+ |target-module@10000ti,sysc 'disabled+ |target-module@12000ti,sysc 'disabled+ | target-module@14000ti,sysc 'disabled+ |@target-module@16000ti,sysc 'disabled+ |`target-module@18000ti,sysc 'disabled+ |target-module@1c000ti,sysc 'disabled+ |target-module@1e000ti,sysc 'disabled+ |target-module@20000ti,sysc 'disabled+ |target-module@26000ti,sysc 'disabled+ |`target-module@28000ti,sysc 'disabled+ |target-module@2a000ti,sysc 'disabled+ |segment@280000simple-pm-bus+segment@300000simple-pm-bus+|042@@2@ `2`p2p2232 2@target-module@0ti,sysc 'disabled+x|@@@ ``pp @interconnect@48000000ti,omap4-l4-persimple-pm-busn rfck0HHHHHHaplaia0ia1ia2ia3+|H H segment@0simple-pm-bus+|  00@@PP``ppPP``pp  00 ` ` p p``pp``pp             @ @ ` ` @     0 0 @ @ P P        P P ` `  0 0 P Ptarget-module@20000ti,sysc-omap2ti,syscPTXrevsyscsyss,9 r0fck+ |serial@0ti,omap4-uart cJ.lUJstarget-module@32000ti,sysc-omap2-timerti,sysc   revsyscsyss,' 9 rfck+ | timer@0ti,omap3430-timerrfcktimer_sys_ck c&target-module@34000ti,sysc-omap4-timerti,sysc@@ revsysc, r fck+ |@timer@0ti,omap4430-timerr fcktimer_sys_ck c'target-module@36000ti,sysc-omap4-timerti,sysc`` revsysc, r(fck+ |`timer@0ti,omap4430-timerr(fcktimer_sys_ck c(target-module@3e000ti,sysc-omap4-timerti,sysc revsysc, r0fck+ |timer@0ti,omap4430-timerr0fcktimer_sys_ck c-itarget-module@40000ti,sysc 'disabled+ |target-module@55000ti,sysc-omap2ti,syscPPQrevsyscsyss,9r@r@ fckdbclk+ |Pgpio@0ti,omap4-gpio cXh#8target-module@57000ti,sysc-omap2ti,syscppqrevsyscsyss,9rHrH fckdbclk+ |pgpio@0ti,omap4-gpio cXh#8target-module@59000ti,sysc-omap2ti,syscrevsyscsyss,9rPrP fckdbclk+ |gpio@0ti,omap4-gpio c Xh#8ztarget-module@5b000ti,sysc-omap2ti,syscrevsyscsyss,9rXrX fckdbclk+ |gpio@0ti,omap4-gpio c!Xh#8target-module@5d000ti,sysc-omap2ti,syscrevsyscsyss,9r`r` fckdbclk+ |gpio@0ti,omap4-gpio c"Xh#8target-module@60000ti,sysc-omap2ti,syscrevsyscsyss,9 rfck+ |i2c@0 ti,omap4-i2c c=+defaultt.eeprom@50 ti,eepromPtarget-module@6a000ti,sysc-omap2ti,syscPTXrevsyscsyss,9 r fck+ |serial@0ti,omap4-uart cH.ltarget-module@6c000ti,sysc-omap2ti,syscPTXrevsyscsyss,9 r(fck+ |serial@0ti,omap4-uart cI.lUIstarget-module@6e000ti,sysc-omap2ti,syscPTXrevsyscsyss,9 r8fck+ |serial@0ti,omap4-uart cF.lUFstarget-module@70000ti,sysc-omap2ti,syscrevsyscsyss,9 rfck+ |i2c@0 ti,omap4-i2c c8+defaultu.twl@48H c ti,twl6030#8defaultvwrtcti,twl4030-rtcc regulator-vaux1ti,twl6030-vaux1B@,-regulator-vaux2ti,twl6030-vaux2O,*regulator-vaux3ti,twl6030-vaux3B@,-regulator-vmmcti,twl6030-vmmcO,-regulator-vppti,twl6030-vppw@,&%regulator-vusimti,twl6030-vusimO,,@ regulator-vdacti,twl6030-vdacregulator-vanati,twl6030-vanaregulator-vcxioti,twl6030-vcxiovregulator-vusbti,twl6030-vusbxregulator-v1v8ti,twl6030-v1v8v{regulator-v2v1ti,twl6030-v2v1v|usb-comparatorti,twl6030-usbc xpwmti,twl6030-pwmpwmledti,twl6030-pwmledgpadcti,twl6030-gpadcctwl@4b ti,twl6040Kdefaulty cw z{|target-module@72000ti,sysc-omap2ti,sysc   revsyscsyss,9 rfck+ | i2c@0 ti,omap4-i2c c9+default}.target-module@76000ti,sysc-omap4ti,sysc`` revsysc, rfck+ |`target-module@78000ti,sysc-omap2ti,syscrevsyscsyss, 9 r8fck+ |elm@0ti,am3352-elm  c 'disabledtarget-module@86000ti,sysc-omap2-timerti,sysc```revsyscsyss,' 9 rfck+ |`timer@0ti,omap3430-timerrfcktimer_sys_ck c.itarget-module@88000ti,sysc-omap4-timerti,sysc revsysc, rfck+ |timer@0ti,omap4430-timerrfcktimer_sys_ck c/itarget-module@90000ti,sysc-omap2ti,sysc   revsysc, ~ fck+ | rng@0 ti,omap4-rng  c4target-module@96000ti,sysc-omap2ti,sysc `sysc,  rfck+ | `mcbsp@0ti,omap4-mcbspmpu ccommon txrx 'disabledtarget-module@98000ti,sysc-omap4ti,sysc   revsysc, rfck+ | spi@0ti,omap4-mcspi cA+ @#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3target-module@9a000ti,sysc-omap4ti,sysc   revsysc, rfck+ | spi@0ti,omap4-mcspi cB+  +,-.tx0rx0tx1rx1target-module@9c000ti,sysc-omap4ti,sysc   revsysc, ^fck+ | mmc@0ti,omap4-hsmmc cS&=>txrx=JVtarget-module@9e000ti,sysc 'disabled+ | target-module@a2000ti,sysc 'disabled+ | target-module@a4000ti,sysc 'disabled+| @ Ptarget-module@a5000ti,sysc-omap2ti,sysc P0 P4 P8revsyscsyss,9 ~fck+ | Pdes@0 ti,omap4-des cRuttxrxtarget-module@a8000ti,sysc 'disabled+ | @target-module@ad000ti,sysc-omap4ti,sysc   revsysc, rfck+ | mmc@0ti,omap4-hsmmc c^&MNtxrx 'disabledtarget-module@b0000ti,sysc 'disabled+ | target-module@b2000ti,sysc-omap2ti,sysc   revsyscsyss,9t rhfck+ | 1w@0 ti,omap3-1w c:target-module@b4000ti,sysc-omap4ti,sysc @ @ revsysc, ^fck+ | @mmc@0ti,omap4-hsmmc cV&/0txrx 'disabledtarget-module@b8000ti,sysc-omap4ti,sysc   revsysc, rfck+ | spi@0ti,omap4-mcspi c[+ tx0rx0target-module@ba000ti,sysc-omap4ti,sysc   revsysc, rfck+ | spi@0ti,omap4-mcspi c0+ FGtx0rx0target-module@d1000ti,sysc-omap4ti,sysc   revsysc, rfck+ | mmc@0ti,omap4-hsmmc c`&9:txrx 'disabledtarget-module@d5000ti,sysc-omap4ti,sysc P P revsysc, r@fck+ | Pmmc@0ti,omap4-hsmmc c;&;<txrxdefaultJU;s`Vn+wlcore@2 ti,wl1271Us: irqwakeupIsegment@200000simple-pm-bus+|55target-module@150000ti,sysc-omap2ti,syscrevsyscsyss,9 rfck+ |i2c@0 ti,omap4-i2c c>+default.target-module@48210000ti,sysc-omap4-simpleti,syscn fck+ |H!mpu ti,omap4-mpuinterconnect@40100000ti,omap4-l4-abesimple-pm-bus@@laapn+|@IIsegment@0simple-pm-bus+0|  00@@PP``pp  00      IIIII I I0I0I@I@IPIPI`I`IpIpIIIIIIIIIIIIIIIII I I0I0IIIIIIIIIIIIIIIIIIIII I I I I I I I III I target-module@22000ti,sysc-omap2ti,sysc sysc,  O(fck+| I I mcbsp@0ti,omap4-mcbspI mpudma ccommon!"txrx'okaydefaulttarget-module@24000ti,sysc-omap2ti,sysc@sysc,  O0fck+|@I@I@mcbsp@0ti,omap4-mcbspI@mpudma ccommontxrx 'disabledtarget-module@26000ti,sysc-omap2ti,sysc`sysc,  O8fck+|`I`I`mcbsp@0ti,omap4-mcbspI`mpudma ccommontxrx 'disabledtarget-module@28000ti,sysc-mcaspti,sysc revsysc  O fck+0|II IImcasp@0ti,omap4-mcasp-audio Impudat cmtxtx O fck 'disabledtarget-module@2e000ti,sysc-omap4ti,sysc revsysc, Ofck+|IIdmic@0ti,omap4-dmicImpudma crCup_link 'disabledtarget-module@30000ti,sysc-omap2ti,syscrevsyscsyss,"9 Ohfck+|IIwdt@0ti,omap4-wdtti,omap3-wdt cPtarget-module@32000ti,sysc-omap4ti,sysc   revsysc, Ofck+| I I 'okaydefaultmcpdm@0ti,omap4-mcpdmI mpudma cpABup_linkdn_linkpdmclktarget-module@38000ti,sysc-omap4-timerti,sysc revsysc, OHfck+|IItimer@0ti,omap4430-timerIOHfcktimer_sys_ck c)target-module@3a000ti,sysc-omap4-timerti,sysc revsysc, OPfck+|IItimer@0ti,omap4430-timerIOPfcktimer_sys_ck c*target-module@3c000ti,sysc-omap4-timerti,sysc revsysc, OXfck+|IItimer@0ti,omap4430-timerIOXfcktimer_sys_ck c+target-module@3e000ti,sysc-omap4-timerti,sysc revsysc, O`fck+|IItimer@0ti,omap4430-timerIO`fcktimer_sys_ck c,itarget-module@80000ti,sysc 'disabled+|IItarget-module@a0000ti,sysc 'disabled+| I I target-module@c0000ti,sysc 'disabled+| I I target-module@f1000ti,sysc-omap4ti,sysc revsysc  Ofck+|IItarget-module@50000000ti,sysc-omap2ti,syscPPPrevsyscsyss 9 fck+|PP@gpmc@50000000ti,omap4430-gpmcP+ crxtxNfck#8Xhtarget-module@52000000ti,sysc-omap4ti,syscRR revsysc,Dn qfck+ |Rtarget-module@54000000ti,sysc-omap4-simpleti,syscn fck+ |Tpmuarm,cortex-a9-pmutarget-module@55082000ti,sysc-omap2ti,syscU U U revsyscsyss , fck4rstctrl |U +mmu@0ti,omap4-iommu cd+target-module@4012c000ti,sysc-omap4ti,sysc@@ revsysc, O@fck+|@IItarget-module@4e000000ti,sysc-omap2ti,syscNN revsysc  |N+dmm@0 ti,omap4-dmm cqtarget-module@4c000000ti,sysc-omap4-simpleti,syscLrev fck+ |Lemif@0 ti,emif-4d cn !6IRtarget-module@4d000000ti,sysc-omap4-simpleti,syscMrev fck+ |Memif@0 ti,emif-4d co !6IRdsp ti,omap4-dsp `kd cromap4-dsp-fw.xe64T'okayipu@55020000 ti,omap4-ipuUl2ramk44 romap4-ipu-fw.xem3'okaytarget-module@4b501000ti,sysc-omap2ti,syscKPKPKPrevsyscsyss,9 ~fck+ |KPaes@0 ti,omap4-aes cUontxrxtarget-module@4b701000ti,sysc-omap2ti,syscKpKpKprevsyscsyss,9 ~fck+ |Kpaes@0 ti,omap4-aes c@rqtxrxtarget-module@4b100000ti,sysc-omap3-shamti,syscKKKrevsyscsyss, 9 ~(fck+ |Ksham@0ti,omap4-sham c3wrxregulator-abb-mpu ti,abb-v2abb_mpu+2'okayJ0{J0`base-addressint-addressxO1regulator-abb-iva ti,abb-v2abb_iva+2 'disabledJ0{J0`base-addressint-addresstarget-module@56000000ti,sysc-omap4ti,syscVV revsyscn fck+ |V}Otarget-module@58000000ti,sysc-omap2ti,syscXX revsyss9n0 fckhdmi_clksys_clktv_clk+ |Xdss@0 ti,omap4-dss'okay fck+ |target-module@1000ti,sysc-omap2ti,syscrevsyscsyss  ,9  fcksys_clk+ |dispc@0ti,omap4-dispc c fcktarget-module@2000ti,sysc-omap2ti,sysc   revsyscsyss ,9  fcksys_clk+ | encoder@0 'disabledNfckicktarget-module@3000ti,sysc-omap2ti,sysc0rev sys_clk+ |0encoder@0ti,omap4-venc 'disabled fcktarget-module@4000ti,sysc-omap2ti,sysc@@@revsyscsyss ,9+ |@encoder@0 ti,omap4-dsi@ protophypll c5 'disabled  fcksys_clk+target-module@5000ti,sysc-omap2ti,syscPPPrevsyscsyss ,9+ |Pencoder@0 ti,omap4-dsi@ protophypll cT'okay  fcksys_clk+target-module@6000ti,sysc-omap4ti,sysc`` revsysc,  fckdss_clk+ |` encoder@0ti,omap4-hdmi wppllphycore ce'okay  fcksys_clkL audio_txportendpointportendpointtarget-module@5a000000ti,sysc-omap4ti,syscZZ revsysc  nrstctrl fck+|ZZ[[iva ti,ivahdbandgap@4a002260J"`J#,ti,omap4430-bandgap *0thermal-zonescpu_thermalF\jzN tripscpu_alertpassivecpu_critH criticalcooling-mapsmap0 lpddr2#elpida,ECB240ABACNjedec,lpddr2-s4     - : Ilpddr2-timings@0jedec,lpddr2-timings V _ׄ hR nFP s: w ' L L L : | P _ ~@ B@ p plpddr2-timings@1jedec,lpddr2-timings V _  hR nFP s: w ' ' L L : | P _ ~@ B@ p pmemory@80000000memoryր@reserved-memory+|dsp-memory@98000000shared-dma-pool֘ 'okayipu-memory@98800000shared-dma-pool֘ 'okayleds gpio-ledsdefaultheartbeat pandaboard::status1 * heartbeatmmc pandaboard::status2 * mmc0gpio_keys gpio-keysdefaultbuttonS2 button S2 *z  soundti,abe-twl6040 PandaBoard $I 1 : EHeadset StereophoneHSOLHeadset StereophoneHSORExt SpkHFLExt SpkHFRLine OutAUXLLine OutAUXRHSMICHeadset MicHeadset MicHeadset Mic BiasAFMLLine InAFMRLine Inhsusb1_power_regregulator-fixed hsusb1_vbus2Z,2Z  Vpv ghsusb1_phyusb-nop-xceiv y 1 main_clk.$bwl12xx_vmmcdefaultregulator-fixedvwl1271w@,w@   Vpencoder0 ti,tfp410 ports+port@0endpointport@1endpointconnector0dvi-connector dvi  portendpointencoder1 ti,tpd12s015$* ports+port@0endpointport@1endpointconnector1hdmi-connector hdmiaportendpoint compatibleinterrupt-parent#address-cells#size-cellsstdout-pathi2c0i2c1i2c2i2c3mmc0mmc1mmc2mmc3mmc4serial0serial1serial2serial3rproc0rproc1display0display1ethernetdevice_typenext-level-cacheregclocksclock-namesclock-latencyoperating-points#cooling-cellsphandleinterrupt-controller#interrupt-cellscache-unifiedcache-levelinterruptspower-domainsrangesreg-namesti,sysc-sidle#clock-cellsclock-output-namesti,index-starts-at-oneti,bit-shiftclock-multclock-divti,max-divti,dividers#power-domain-cells#reset-cellsti,sysc-maskti,syss-maskti,gpio-always-ongpio-controller#gpio-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parents#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsstatusclock-frequencyti,autoidle-shiftti,invert-autoidle-bitti,index-power-of-twoassigned-clock-ratesti,clock-divti,clock-multti,sysc-midle#dma-cellsdma-channelsdma-requestsinterrupt-namesport1-moderemote-wakeup-connectedphysresetsreset-names#iommu-cellsusb-phyphy-namesmultipointnum-epsram-bitsctrl-moduleinterface-typepower#phy-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rx#hwlock-cellspinctrl-namespinctrl-0sysconregulator-nameregulator-min-microvoltregulator-max-microvoltti,sysc-delay-usinterrupts-extendedti,timer-pwmregulator-always-onusb-supply#pwm-cells#io-channel-cellsti,audpwron-gpiovio-supplyv2v1-supplyenable-active-highti,buffer-sizedmasdma-namesti,spi-num-csti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplybus-widthnon-removablecap-power-off-cardref-clock-frequencysramop-modeserial-dirti,timer-dspti,no-idle-on-initgpmc,num-csgpmc,num-waitpinsti,iommu-bus-err-backphy-typehw-caps-read-idle-ctrlhw-caps-ll-interfacehw-caps-temp-alertcs1-useddevice-handleti,bootregiommusfirmware-namemboxesmemory-regionti,timersti,watchdog-timersti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infovdd-supplyvdda-supplyremote-endpointdata-linesgpios#thermal-sensor-cellspolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresistripcooling-devicedensityio-widthtRPab-min-tcktRCD-min-tcktWR-min-tcktRASmin-min-tcktRRD-min-tcktWTR-min-tcktXP-min-tcktRTP-min-tcktCKE-min-tcktCKESR-min-tcktFAW-min-tckmin-freqmax-freqtRPabtRCDtWRtRAS-mintRRDtWTRtXPtRTPtCKESRtDQSCK-maxtFAWtZQCStZQCLtZQinittRAS-max-nstDQSCK-max-deratedreusablelabellinux,default-triggerlinux,codewakeup-sourceti,modelti,mclk-freqti,mcpdmti,twl6040ti,audio-routingstartup-delay-usregulator-boot-onreset-gpiosvcc-supplypowerdown-gpiosdigitalddc-i2c-bus