Ð þíM@8FÀ(€Fˆ elgin,rv1108-r1rockchip,rv1108&7Elgin RV1108 R1 boardaliases=/i2c@20000000B/i2c@10240000G/i2c@10250000L/i2c@10260000Q/serial@10230000Y/serial@10220000a/serial@10210000i/mmc@30110000cpuscpu@f00ncpuarm,cortex-a7z~œ@Œ“¢K¼ÐÛopp-table-0operating-points-v2Ûopp-408000000ãQ–êà˜øœ@opp-600000000ã#ÃFêà˜øœ@opp-816000000ã0£,ê£èøœ@opp-1008000000ã<ÜêŒ0øœ@arm-pmuarm,cortex-a7-pmu  Ltimerarm,armv7-timer  8n6oscillator fixed-clock8n6Hxin24m[Ûsram@10080000 mmio-sramz  h serial@10210000&rockchip,rv1108-uartsnps,dw-apb-uartz!  .oy8n6ŒJ †baudclkapb_pclk’—default¥¯okayserial@10220000&rockchip,rv1108-uartsnps,dw-apb-uartz"  -oy8n6ŒI †baudclkapb_pclk’—default¥ ¯disabledserial@10230000&rockchip,rv1108-uartsnps,dw-apb-uartz#  ,oy8n6ŒH †baudclkapb_pclk’—default¥¯okayi2c@10240000rockchip,rv1108-i2cz$  Œv †i2cpclk—default¥ ¶  ¯disabledi2c@10250000rockchip,rv1108-i2cz%  Œw †i2cpclk—default¥ ¶  ¯disabledi2c@10260000rockchip,rv1108-i2cz&  !Œx †i2cpclk—default¥ ¶  ¯disabledspi@10270000rockchip,rv1108-spiz'  %Œl†spiclkapb_pclk’ Ãtxrx¯okay—default¥ display@0elgin,jg10309-01zÍn6ßèpwm@10280000(rockchip,rv1108-pwmrockchip,rk3288-pwmz(Œy  †pwmpclk—default¥ñ ¯disabledpwm@10280010(rockchip,rv1108-pwmrockchip,rk3288-pwmz(Œy  †pwmpclk—default¥ñ ¯disabledpwm@10280020(rockchip,rv1108-pwmrockchip,rk3288-pwmz( Œy  †pwmpclk—default¥ñ ¯disabledpwm@10280030(rockchip,rv1108-pwmrockchip,rk3288-pwmz(0Œy  †pwmpclk—default¥ñ ¯disableddma-controller@102a0000arm,pl330arm,primecellz*@  ü"ŒÀ †apb_pclkÛsyscon@10300000&rockchip,rv1108-grfsysconsimple-mfdz0Û io-domains"rockchip,rv1108-io-voltage-domain ¯disabledusb2phy@100rockchip,rv1108-usb2phyz Œ{†phyclk[Husbphy9¯okayÛ+otg-port  0Iotg-muxY¯okayÛ-host-port  3 IlinestateY¯okayÛ,timer@10350000,rockchip,rv1108-timerrockchip,rk3288-timerz5   # Œ †pclktimerwatchdog@10360000 rockchip,rv1108-wdtsnps,dw-wdtz6  "Œ ¯disabledthermal-zonessoc-thermaldzèˆ2štripstrip-point0ªp¶Ðupassivetrip-point1ªL¶ÐupassiveÛsoc-critªs¶Ð ucriticalcooling-mapsmap0Á ÆÿÿÿÿÿÿÿÿÕtsadc@10370000rockchip,rv1108-tsadcz7  /ânò q°Œn †tsadcapb_pclk—initdefaultsleep¥H "tsadc-apb.ÔÀE ¯disabledÛadc@1038c000.rockchip,rv1108-saradcrockchip,rk3399-saradcz8À  [Œm†saradcapb_pclk ¯disabledi2c@20000000rockchip,rv1108-i2cz   Œ[ †i2cpclk—default¥¶ ¯okay8€m„pmic@18rockchip,rk805z& œ[½ÉÕáíùregulatorsDCDC_REG1 vdd_core ®`,ã`DXÛregulator-state-memj‚ » DCDC_REG2 vdd_buck2!‘À,!‘ÀDXÛregulator-state-memžDCDC_REG3vcc_ddrDXregulator-state-memjDCDC_REG4vcc_io2Z ,2Z DXregulator-state-memj‚2Z LDO_REG1vdd_10B@,B@DXregulator-state-memžLDO_REG2vcc_18w@,w@DXregulator-state-memžLDO_REG3 vdd10_pmuB@,B@DXregulator-state-memj‚B@pwm@20040000(rockchip,rv1108-pwmrockchip,rk3288-pwmz ŒZ †pwmpclk—default¥ ñ ¯disabledpwm@20040010(rockchip,rv1108-pwmrockchip,rk3288-pwmz ŒZ †pwmpclk—default¥!ñ ¯disabledpwm@20040020(rockchip,rv1108-pwmrockchip,rk3288-pwmz  ŒZ †pwmpclk—default¥"ñ ¯disabledpwm@20040030(rockchip,rv1108-pwmrockchip,rk3288-pwmz 0ŒZ †pwmpclk—default¥#ñ ¯disabledsyscon@20060000)rockchip,rv1108-pmugrfsysconsimple-mfdz Û3io-domains&rockchip,rv1108-pmu-io-voltage-domain ¯disabledsyscon@202a0000rockchip,rv1108-usbgrfsysconz *Ûclock-controller@20200000rockchip,rv1108-cruz Œ†xin24m¶ [·Ûnand-controller@30100000rockchip,rv1108-nfcz0  ŒCC†ahbnfcâCòðÑ€ ¯disabledmmc@301100000rockchip,rv1108-dw-mshcrockchip,rk3288-dw-mshcz0@   ŒFGSV†biuciuciu-driveciu-sampleÄÑðÑ€¯okayÏÙëñù—default ¥$%&mmc@301200000rockchip,rv1108-dw-mshcrockchip,rk3288-dw-mshcz0@   ŒEERU†biuciuciu-driveciu-sampleÄÑðÑ€ ¯disabledmmc@301300000rockchip,rv1108-dw-mshcrockchip,rk3288-dw-mshcz0@   ŒDDQT†biuciuciu-driveciu-sampleÄÑõá—default¥'()* ¯disabledusb@30140000 generic-ehciz0   ŒS+#,(usb¯okayusb@30160000 generic-ohciz0   ŒS+#,(usb¯okayusb@301800002rockchip,rv1108-usbrockchip,rk3066-usbsnps,dwc2z0  ŒT†otg2otg:L[€€@ #- (usb2-phy¯okayspi@301c0000 rockchip,sfcz0@  8ŒPH†clk_sfchclk_sfc ¥./0—default ¯disabledethernet@30200000rockchip,rv1108-gmacz0  Imacirqeth_wake_irq8ŒpqqrsÒM†stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macjrmii—default¥1¶ ¯okaysoutput €2interrupt-controller@32010000 arm,gic-400¦» z22 2@ 2`    Ûpinctrlrockchip,rv1108-pinctrl¶ Ì3hgpio@20030000rockchip,gpio-bankz   (ŒÙ馻Ûgpio@10310000rockchip,gpio-bankz1  )ŒÙ馻Û2gpio@10320000rockchip,gpio-bankz2  *ŒÙ馻gpio@10330000rockchip,gpio-bankz3  +ŒÙ馻pcfg-pull-upõÛ9pcfg-pull-downpcfg-pull-noneÛ6pcfg-pull-none-drv-8maÛ5pcfg-pull-none-drv-12ma Û7pcfg-pull-none-smt-Û8pcfg-pull-up-drv-8maõÛ4pcfg-pull-none-drv-4maÛ:pcfg-pull-up-drv-4maõÛ;pcfg-output-highBpcfg-output-lowNpcfg-input-highõYemmcemmc-bus8€f44444444Û&emmc-clkf5Û$emmc-cmdf 4Û%sfcsfc-bus4@f6666Û0sfc-bus2 f66sfc-cs0f 6Û/sfc-clkf6Û.gmacrmii-pins f666 7 7 7 6666Û1i2c0i2c0-xfer f 8 8Ûi2c1i2c1-xfer f99Û i2c2m1i2c2m1-xfer f66Û i2c2m1-pins f66i2c2m05vi2c2m05v-xfer f66i2c2m05v-pins f66i2c3i2c3-xfer f66Û pwm0pwm0-pinf6Û pwm1pwm1-pinf6Û!pwm2pwm2-pinf6Û"pwm3pwm3-pinf6Û#pwm4pwm4-pinf6Ûpwm5pwm5-pinf6Ûpwm6pwm6-pinf6Ûpwm7pwm7-pinf 6Ûsdmmcsdmmc-clkf:Û'sdmmc-cmdf;Û(sdmmc-cdf;Û)sdmmc-bus1f;sdmmc-bus4@f;;;;Û*spim0spim0-clkf9spim0-cs0f9spim0-txf9spim0-rxf9spim1spim1-clkf9Û spim1-cs0f9Ûspim1-rxf9Ûspim1-txf9Ûtsadcotp-outf6Ûotp-pinf6Ûuart0uart0-xfer f96Ûuart0-ctsf6uart0-rtsf6uart0-rts-pinf6uart1uart1-xfer f96Ûuart1-ctsf6uart1-rtsf6uart2m0uart2m0-xfer f96Ûuart2m1uart2m1-xfer f96uart2_5vuart2_5v-ctsf6uart2_5v-rtsf6memory@60000000nmemoryz`chosentserial2:1500000n8vsys-regulatorregulator-fixedvsysLK@,LK@XÛ #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2i2c3serial0serial1serial2mmc0device_typeregclock-latencyclocks#cooling-cellsdynamic-power-coefficientoperating-points-v2cpu-supplyphandleopp-hzopp-microvoltclock-latency-nsinterruptsarm,cpu-registers-not-fw-configuredclock-frequencyclock-output-names#clock-cellsrangesreg-shiftreg-io-widthclock-namesdmaspinctrl-namespinctrl-0statusrockchip,grfdma-namesspi-max-frequencyspi-cphaspi-cpol#pwm-cells#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstrockchip,usbgrfinterrupt-names#phy-cellspolling-delay-passivepolling-delaysustainable-powerthermal-sensorstemperaturehysteresistripcooling-devicecontributionassigned-clocksassigned-clock-ratespinctrl-1pinctrl-2resetsreset-namesrockchip,hw-tshut-temp#thermal-sensor-cells#io-channel-cellsi2c-scl-rising-time-nsi2c-scl-falling-time-nsrockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-on-in-suspendregulator-suspend-microvoltregulator-off-in-suspend#reset-cellsfifo-depthbus-widthcap-mmc-highspeedno-sdno-sdionon-removablemmc-ddr-1_8vmmc-hs200-1_8vphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowinterrupt-controller#interrupt-cellsrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enableoutput-highoutput-lowinput-enablerockchip,pinsstdout-path