&{8H( 33logicpd,dm3730-torpedo-devkitti,omap3630ti,omap3 +77LogicPD Zoom DM3730 Torpedo + Wireless Development Kitchosen=/ocp@68000000/serial@4806a000aliasesI/ocp@68000000/i2c@48070000N/ocp@68000000/i2c@48072000S/ocp@68000000/i2c@48060000X/ocp@68000000/mmc@4809c000]/ocp@68000000/mmc@480b4000b/ocp@68000000/mmc@480ad000g/ocp@68000000/serial@4806a000o/ocp@68000000/serial@4806c000w/ocp@68000000/serial@49020000/ocp@68000000/serial@49042000 /displaycpus+cpu@0arm,cortex-a8cpucpu"pmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus +  pinmux@30 ti,omap3-padconfpinctrl-single08+.?Trmcbsp2-pins  uart2-pins(DFHJhmcspi1-pins hsusb-otg-pins`rtvxz|~i2c1-pinsi2c2-pinsi2c3-pinstwl4030-pinsAgpio-key-pins%hdq-pinspwm-pins)led-pins#mmc1-pins0tsc2004-pinsVbacklight-pinsX.isp-pins`panel-pwr-pinsZ+dss-dpi1-pins      mm3-pins0468:T^scm_conf@270sysconsimple-busp0+ p0pbias_regulator@2b0ti,pbias-omap3ti,pbias-omappbias_mmc_omap2430pbias_mmc_omap2430w@-clocks+clock@68 ti,clkselh+clock-mcbsp5-mux-fck@4ti,composite-mux-clockmcbsp5_mux_fck clock-mcbsp3-mux-fck@0ti,composite-mux-clockmcbsp3_mux_fck clock-mcbsp4-mux-fck@2ti,composite-mux-clockmcbsp4_mux_fck mcbsp5_fckti,composite-clock  clock@4 ti,clksel+clock-mcbsp1-mux-fck@2ti,composite-mux-clockmcbsp1_mux_fck clock-mcbsp2-mux-fck@6ti,composite-mux-clockmcbsp2_mux_fck mcbsp1_fckti,composite-clock mcbsp2_fckti,composite-clockmcbsp3_fckti,composite-clockmcbsp4_fckti,composite-clock clockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+.?Trtwl4030-vpins-pins gpio-key-wkup-pins &lan9221-pinsZmmc1-cd-pinsTisp1763-pinsXtarget-module@480a6000ti,sysc-omap2ti,syscH `DH `HH `L revsyscsyss  .ick+ H ` aes1@0 ti,omap3-aesP;  @txrxtarget-module@480c5000ti,sysc-omap2ti,syscH PDH PHH PL revsyscsyss  .ick+ H P aes2@0 ti,omap3-aesP;AB@txrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockJYosc_sys_ck@d40 ti,mux-clock @sys_ck@1270ti,divider-clockZgpr"sys_clkout1@d70ti,gate-clock pZdpll3_x2_ckfixed-factor-clockdpll3_m2x2_ckfixed-factor-clock!dpll4_x2_ckfixed-factor-clock corex2_fckfixed-factor-clock!#wkup_l4_ickfixed-factor-clock"bcorex2_d3_fckfixed-factor-clock#corex2_d5_fckfixed-factor-clock#clockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockJomap_32k_fck fixed-clockJHvirt_12m_ck fixed-clockJvirt_13m_ck fixed-clockJ]@virt_19200000_ck fixed-clockJ$virt_26000000_ck fixed-clockJvirt_38_4m_ck fixed-clockJIdpll4_ck@d00ti,omap3-dpll-per-j-type-clock"" D 0 dpll4_m2_ck@d48ti,divider-clock g? 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