t8( ۨ *,rockchip,rk3568-odroid-m1rockchip,rk35687Hardkernel ODROID-M1aliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fe5c0000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fdd40000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fe650000/serial@fdd50000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/ethernet@fe2a0000/mmc@fe310000/mmc@fe2b0000cpus cpu@0cpu,arm,cortex-a55psci%9D cpu@100cpu,arm,cortex-a55psci%9D cpu@200cpu,arm,cortex-a55psci%9D cpu@300cpu,arm,cortex-a55psci%9D opp-table-0,operating-points-v2LDopp-408000000WQ ^ 0l@opp-600000000W#F ^ 0opp-816000000W0, ^ 0}opp-1104000000WAʹ ^ 0opp-1416000000WTfr ^ 0opp-1608000000W_" ^0opp-1800000000WkI ^0opp-1992000000Wv ^000display-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smc protocol@14Dopp-table-1,operating-points-v2DDopp-200000000W ^ opp-300000000W^ opp-400000000Wׄ^ opp-600000000W#F^ opp-700000000W)'^ opp-800000000W/^B@hdmi-sound,simple-audio-cardHDMIi2sokaysimple-audio-card,codecsimple-audio-card,cpupmu,arm,cortex-a55-pmu0 psci ,arm,psci-1.0smctimer,arm,armv8-timer0   &xin24m ,fixed-clock=n6Mxin24mDxin32k ,fixed-clock=Mxin32k` jdefaultsram@10f000 ,mmio-sram xsram@0,arm,scmi-shmemDsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@satapmaliverxoob _ sata-phy disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob ` sata-phyokayusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@ ref_clksuspend_clkbus_clkhost utmi_wideokay usb2-phyusb3-phyusb@fd000000,rockchip,rk3568-dwc3snps,dwc3@ ref_clksuspend_clkbus_clkhost usb2-phyusb3-phy utmi_wideokayinterrupt-controller@fd400000 ,arm,gic-v3 @F  A(&Dusb@fd800000 ,generic-ehci usbokayusb@fd840000 ,generic-ohci usbokayusb@fd880000 ,generic-ehci usbokayusb@fd8c0000 ,generic-ohci usbokaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdDio-domains&,rockchip,rk3568-pmu-io-voltage-domainokay5CQ_m{syscon@fdc50000 ,rockchip,rk3568-pipe-grfsysconDsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdDsyscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconDsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconDsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconDsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀDclock-controller@fdd00000,rockchip,rk3568-pmucruDclock-controller@fdd20000,rockchip,rk3568-cruxin24mG Di2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c .- i2cpclk`jdefault okayregulator@1c ,tcs,tcs4525vdd_cpu2D 5\0t Dregulator-state-mempmic@20,rockchip,rk809 !HmclkHjdefault`"#    & 2 > J V bDregulatorsDCDC_REG1 vdd_logic2p D \ptqregulator-state-memDCDC_REG2vdd_gpup D \ptqDEregulator-state-memDCDC_REG3vcc_ddr2regulator-state-memDCDC_REG4vdd_npup D \ptqregulator-state-memDCDC_REG5vcc_1v82Dw@\w@Dregulator-state-memLDO_REG1vdda0v9_imageD \ DRregulator-state-memLDO_REG2 vdda_0v92D \ regulator-state-memLDO_REG3 vdda0v9_pmu2D \ regulator-state-mem LDO_REG4 vccio_acodec2D2Z\2ZDregulator-state-memLDO_REG5 vccio_sdDw@\2ZDregulator-state-memLDO_REG6 vcc3v3_pmu2D2Z\2ZDregulator-state-mem2ZLDO_REG7 vcca_1v82Dw@\w@Dregulator-state-memLDO_REG8 vcca1v8_pmu2Dw@\w@regulator-state-memw@LDO_REG9vcca1v8_imageDw@\w@DSregulator-state-memSWITCH_REG1vcc_3v32Dregulator-state-memSWITCH_REG2 vcc3v3_sdD[regulator-state-memserial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart t ,baudclkapb_pclk$$`%jdefault disabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk`&jdefault disabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk`'jdefault disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk`(jdefault disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0 0 pwmpclk`)jdefault disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controller Dpower-domain@7*power-domain@8 +,-power-domain@9  ./0power-domain@10 123456power-domain@11 7power-domain@13 8power-domain@14 9:;power-domain@15 <=>?@ABCgpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$()' jobmmugpugpubus%Dokay&EDvideo-codec@fdea0400,rockchip,rk3568-vpu vdpu aclkhclk2F iommu@fdea0800,rockchip,rk3568-iommu@  aclkiface 9DFvideo-codec@fdee0000,rockchip,rk3568-vepu @ aclkhclk2G iommu@fdee0800,rockchip,rk3568-iommu@ ? aclkiface 9DGmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ d biuciuciu-driveciu-sampleFQр_reset disabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20a macirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref _stmmacethkH{IJ disabledmdio,snps,dwmac-mdio stmmac-axi-configDHrx-queues-configDIqueue0tx-queues-configDJqueue0vop@fe040000 0@vopgamma-lut (%aclkhclkdclk_vp0dclk_vp1dclk_vp22K okay,rockchip,rk3568-vopports Dport@0 endpoint@2LDTport@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu >?  aclkiface9okayDKdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi D pclkhclkdphyM _apb disabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi E pclkhclkdphyN _apb disabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  -((iahbisfrcecrefjdefault `OPQ okay+R;SDports port@0endpointTDLport@1endpointUDqos@fe128000,rockchip,rk3568-qossyscon D*qos@fe138080,rockchip,rk3568-qossyscon D9qos@fe138100,rockchip,rk3568-qossyscon D:qos@fe138180,rockchip,rk3568-qossyscon D;qos@fe148000,rockchip,rk3568-qossyscon D+qos@fe148080,rockchip,rk3568-qossyscon D,qos@fe148100,rockchip,rk3568-qossyscon D-qos@fe150000,rockchip,rk3568-qossyscon D7qos@fe158000,rockchip,rk3568-qossyscon D1qos@fe158100,rockchip,rk3568-qossyscon D2qos@fe158180,rockchip,rk3568-qossyscon D3qos@fe158200,rockchip,rk3568-qossyscon D4qos@fe158280,rockchip,rk3568-qossyscon D5qos@fe158300,rockchip,rk3568-qossyscon D6qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon D<qos@fe190280,rockchip,rk3568-qossyscon D@qos@fe190300,rockchip,rk3568-qossyscon DAqos@fe190380,rockchip,rk3568-qossyscon DBqos@fe190400,rockchip,rk3568-qossyscon DCqos@fe198000,rockchip,rk3568-qossyscon D8qos@fe1a8000,rockchip,rk3568-qossyscon D.qos@fe1a8080,rockchip,rk3568-qossyscon D/qos@fe1a8100,rockchip,rk3568-qossyscon D0pcie@fe260000,rockchip,rk3568-pcie0@&dbiapbconfig<KJIHGsyspmcmsglegacyerrK($aclk_mstaclk_slvaclk_dbipclkauxpciU`hVVVVv pcie-phyTx @@_pipe  disabledlegacy-interrupt-controller HDVmmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ b biuciuciu-driveciu-sampleFQр_resetokay !jdefault`WXYZ[mmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ c biuciuciu-driveciu-sampleFQр_reset disabledspi@fe300000 ,rockchip,sfc0@ exvclk_sfchclk_sfc`\jdefaultokay flash@0,jedec,spi-nor->partitions,fixed-partitions partition@0OSPLpartition@e0000 OU-Boot Envpartition@100000OU-Boot partition@300000Osplash0partition@400000 OFilesystem@mmc@fe310000,rockchip,rk3568-dwcmshc1 {} n6(|zy{}corebusaxiblocktimerokayQ Ujdefault`]^_`ai2s@fe400000,rockchip,rk3568-i2s-tdm@ 4=AFqFq?C9mclk_txmclk_rxhclkbctxPQ _tx-mrx-mokayDi2s@fe410000,rockchip,rk3568-i2s-tdmA 5EIFqFqGK:mclk_txmclk_rxhclkbbcrxtxRS _tx-mrx-mjdefault0`cdefghijklmnokaymDi2s@fe420000,rockchip,rk3568-i2s-tdmB 6MFqOO;mclk_txmclk_rxhclkbbctxrxT_mjdefault`opqr disabledi2s@fe430000,rockchip,rk3568-i2s-tdmC 7SW<mclk_txmclk_rxhclkbbctxrxUV _tx-mrx-m disabledpdm@fe440000,rockchip,rk3568-pdmD LZYpdm_clkpdm_hclkb crx`stuvwxjdefaultX_pdm-m disabledspdif@fe460000,rockchip,rk3568-spdifF f mclkhclk_\bctxjdefault`y disableddma-controller@fe530000,arm,pl330arm,primecellS@   apb_pclkD$dma-controller@fe550000,arm,pl330arm,primecellU@  apb_pclkDbi2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ /HG i2cpclk`zjdefault  disabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ 0JI i2cpclk`{jdefault  disabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ 1LK i2cpclk`|jdefault  disabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] 2NM i2cpclk`}jdefault  disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ 3PO i2cpclk`~jdefault  disabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt`  tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia gRQspiclkapb_pclk$$ctxrxjdefault `  disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib hTSspiclkapb_pclk$$ctxrxjdefault `  disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic iVUspiclkapb_pclk$$ctxrxjdefault `  disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid jXWspiclkapb_pclk$$ctxrxjdefault `  disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte ubaudclkapb_pclk$$`jdefault disabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf v# baudclkapb_pclk$$`jdefaultokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg w'$baudclkapb_pclk$$`jdefault disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth x+(baudclkapb_pclk$$ `jdefault disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti y/,baudclkapb_pclk$ $ `jdefault disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj z30baudclkapb_pclk$ $ `jdefault disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk {74baudclkapb_pclk$$`jdefault disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl |;8baudclkapb_pclk$$`jdefault disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm }?<baudclkapb_pclk$$`jdefault disabledthermal-zonescpu-thermaldtripscpu_alert0ppassiveDcpu_alert1$passivecpu_crits criticalcooling-mapsmap00 gpu-thermaltripsgpu-thresholdppassivegpu-target$passiveDgpu-crits criticalcooling-mapsmap0 tsadc@fe710000,rockchip,rk3568-tsadcq sf@ `tsadcapb_pclk sjinitdefaultsleep`  * 4okay J aDsaradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr ]saradcapb_pclk _saradc-apb |okay pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclk`jdefault disabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclk`jdefault disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclk`jdefault disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0ZY pwmpclk`jdefault disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclk`jdefault disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclk`jdefault disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclk`jdefault disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0]\ pwmpclk`jdefault disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclk`jdefault disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclk`jdefault disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclk`jdefault disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0`_ pwmpclk`jdefault disabledphy@fe830000,rockchip,rk3568-naneng-combphy"} refapbpipe"   okay Dphy@fe840000,rockchip,rk3568-naneng-combphy%~ refapbpipe%   okayDphy@fe870000,rockchip,rk3568-csi-dphyypclk _apb disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy refpclkz  _apb disabledDMmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy refpclk{  _apb disabledDNusb2phy@fe8a0000,rockchip,rk3568-usb2phyphyclkMclk_usbphy0_480m  okayhost-port okay Dotg-port okay Dusb2phy@fe8b0000,rockchip,rk3568-usb2phyphyclkMclk_usbphy1_480m  okayhost-port okay Dotg-port okay Dpinctrl,rockchip,rk3568-pinctrl  xgpio@fdd60000,rockchip,gpio-bank !.   D!gpio@fe740000,rockchip,gpio-bankt "cd  gpio@fe750000,rockchip,gpio-banku #ef  Dgpio@fe760000,rockchip,gpio-bankv $gh  Dgpio@fe770000,rockchip,gpio-bankw %ij  Dpcfg-pull-up Dpcfg-pull-none Dpcfg-pull-none-drv-level-1  +Dpcfg-pull-none-drv-level-2  +Dpcfg-pull-none-drv-level-3  +Dpcfg-pull-up-drv-level-1  +Dpcfg-pull-up-drv-level-2  +Dpcfg-pull-none-smt  :Dacodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 OD cpuebcedpdpemmcemmc-rstnout ODaemmc-bus8 O  D]emmc-clk OD^emmc-cmd OD_emmc-datastrobe OD`eth0eth1flashfspifspi-dual-io-pins@ OD\gmac0gmac0-miim ODgmac0-rx-bus20 ODgmac0-tx-bus20 O   Dgmac0-rgmii-clk ODgmac0-rgmii-bus@ ODgmac1gpuhdmitxhdmitxm0-cec ODQhdmitx-scl ODOhdmitx-sda ODPi2c0i2c0-xfer O  Di2c1i2c1-xfer O  Dzi2c2i2c2m0-xfer O D{i2c3i2c3m0-xfer OD|i2c4i2c4m0-xfer O  D}i2c5i2c5m0-xfer O  D~i2s1i2s1m0-lrckrx ODfi2s1m0-lrcktx ODei2s1m0-mclk OD#i2s1m0-sclkrx ODdi2s1m0-sclktx ODci2s1m0-sdi0 O Dgi2s1m0-sdi1 O Dhi2s1m0-sdi2 O Dii2s1m0-sdi3 ODji2s1m0-sdo0 ODki2s1m0-sdo1 ODli2s1m0-sdo2 O Dmi2s1m0-sdo3 O Dni2s2i2s2m0-lrcktx ODpi2s2m0-sclktx ODoi2s2m0-sdi ODqi2s2m0-sdo ODri2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk ODspdmm0-clk1 ODtpdmm0-sdi0 O Dupdmm0-sdi1 O Dvpdmm0-sdi2 O Dwpdmm0-sdi3 ODxpmicpmic-int-l OD"pmupwm0pwm0m0-pins OD&pwm1pwm1m0-pins OD'pwm2pwm2m0-pins OD(pwm3pwm3-pins OD)pwm4pwm4-pins ODpwm5pwm5-pins ODpwm6pwm6-pins ODpwm7pwm7-pins ODpwm8pwm8m0-pins O Dpwm9pwm9m0-pins O Dpwm10pwm10m0-pins O Dpwm11pwm11m0-pins ODpwm12pwm12m0-pins ODpwm13pwm13m0-pins ODpwm14pwm14m0-pins ODpwm15pwm15m0-pins ODrefclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ ODWsdmmc0-clk ODXsdmmc0-cmd ODYsdmmc0-det ODZsdmmc1sdmmc2spdifspdifm0-tx ODyspi0spi0m0-pins0 O Dspi0m0-cs0 ODspi0m0-cs1 ODspi1spi1m0-pins0 O Dspi1m0-cs0 ODspi1m0-cs1 ODspi2spi2m0-pins0 ODspi2m0-cs0 ODspi2m0-cs1 ODspi3spi3m0-pins0 O  Dspi3m0-cs0 ODspi3m0-cs1 ODtsadctsadc-shutorg ODtsadc-pin ODuart0uart0-xfer OD%uart1uart1m0-xfer O  Duart2uart2m0-xfer ODuart3uart3m0-xfer ODuart4uart4m0-xfer ODuart5uart5m0-xfer ODuart6uart6m0-xfer ODuart7uart7m0-xfer ODuart8uart8m0-xfer ODuart9uart9m0-xfer ODvopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2ir-receiverir-receiver-pin ODledsled-power-pin ODled-work-pin ODpciepcie-reset-pin ODvcc3v3-pcie-en-pin ODrk809hp-det-pin ODusbvcc5v0-usb-host-en-pin ODvcc5v0-usb-dr-en-pin ODsata@fc000000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob ^ sata-phy disabledsyscon@fdc70000$,rockchip,rk3568-pipe-phy-grfsysconDqos@fe190080,rockchip,rk3568-qossyscon D=qos@fe190100,rockchip,rk3568-qossyscon D>qos@fe190200,rockchip,rk3568-qossyscon D?syscon@fdcb8000%,rockchip,rk3568-pcie3-phy-grfsysconˀDphy@fe8c0000,rockchip,rk3568-pcie3-phy &'wrefclk_mrefclk_npclk_phy ]okayDpcie@fe270000,rockchip,rk3568-pcie K($aclk_mstaclk_slvaclk_dbipclkauxpci<syspmcmsglegacyerrU`hv pcie-phy0@@'Tx @@@dbiapbconfig_pipe disabledlegacy-interrupt-controller Dpcie@fe280000,rockchip,rk3568-pcie K($aclk_mstaclk_slvaclk_dbipclkauxpci<syspmcmsglegacyerrU`hv  pcie-phy0@(Tx @@dbiapbconfig_pipeokayjdefault` n zlegacy-interrupt-controller Dethernet@fe2a0000&,rockchip,rk3568-gmacsnps,dwmac-4.20a*macirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref _stmmacethk{okaysY@ output  rgmii jdefault` O -mdio,snps,dwmac-mdio ethernet-phy@0,ethernet-phy-ieee802.3-c22 N   nDstmmac-axi-configDrx-queues-configDqueue0tx-queues-configDqueue0phy@fe820000,rockchip,rk3568-naneng-combphy| refapbpipe   okay Dchosen serial2:1500000n8dc-12v-regulator,regulator-fixeddc_12v2D\Dhdmi-con,hdmi-connectoraportendpointDUir-receiver,gpio-ir-receiver !jdefault`leds ,gpio-ledsled-0 ! power  keep default-onjdefault`led-1 ! heartbeat  heartbeatjdefault`rk809-sound,simple-audio-cardjdefault` Analog RK817i2s !%