/8(Tmilkv,duosophgo,cv1800b &Milk-V Duocpus,}x@cpu@0thead,c906riscv?cpuKO@bo|@ riscv,sv39 rv64imafdcrv64i(imafdczicntrzicsrzifenceizihpminterrupt-controllerriscv,cpu-intcoscillator fixed-clockosc_25m!.}x@soc simple-bus>O_clock-controller@3002000K f!sophgo,cv1800-clkgpio@3020000snps,dw-apb-gpioKgpio-controller@0snps,dw-apb-gpio-portm} K<gpio@3021000snps,dw-apb-gpioKgpio-controller@0snps,dw-apb-gpio-portm} K=gpio@3022000snps,dw-apb-gpioK gpio-controller@0snps,dw-apb-gpio-portm} K>gpio@3023000snps,dw-apb-gpioK0gpio-controller@0snps,dw-apb-gpio-portm} K?i2c@4000000snps,designware-i2cKf35 refpclk1 disabledi2c@4010000snps,designware-i2cKf36 refpclk2 disabledi2c@4020000snps,designware-i2cKf37 refpclk3 disabledi2c@4030000snps,designware-i2cKf38 refpclk4 disabledi2c@4040000snps,designware-i2cKf39 refpclk5 disabledserial@4140000snps,dw-apb-uartK,fMNbaudclkapb_pclkokayserial@4150000snps,dw-apb-uartK-fOPbaudclkapb_pclk disabledserial@4160000snps,dw-apb-uartK.fQRbaudclkapb_pclk disabledserial@4170000snps,dw-apb-uartK/fSTbaudclkapb_pclk disabledspi@4180000snps,dw-apb-ssiKf=> ssi_clkpclk6 disabledspi@4190000snps,dw-apb-ssiKf=? ssi_clkpclk7 disabledspi@41a0000snps,dw-apb-ssiKf=@ ssi_clkpclk8 disabledspi@41b0000snps,dw-apb-ssiKf=A ssi_clkpclk9 disabledserial@41c0000snps,dw-apb-uartK0fUVbaudclkapb_pclk disabledmmc@4310000sophgo,cv1800b-dwcmshcK1$f corebusokaydma-controller@4330000snps,axi-dma-1.01aK3f..core-clkcfgr-clk   (9 disabledinterrupt-controller@70000000KpI  ]e$sophgo,cv1800b-plicthead,c900-plictimer@74000000KtI&sophgo,cv1800b-clintthead,c900-clintmemory@80000000?memoryKaliasesh/soc/serial@4140000p/soc/serial@4150000x/soc/serial@4160000/soc/serial@4170000/soc/serial@41c0000chosenserial0:115200n8reserved-memory_region@83f40000K  #address-cells#size-cellscompatiblemodeltimebase-frequencydevice_typeregd-cache-block-sized-cache-setsd-cache-sizei-cache-block-sizei-cache-setsi-cache-sizemmu-typeriscv,isariscv,isa-baseriscv,isa-extensionsinterrupt-controller#interrupt-cellsphandleclock-output-names#clock-cellsclock-frequencyinterrupt-parentdma-noncoherentrangesclocksgpio-controller#gpio-cellsngpiosinterruptsclock-namesstatusreg-shiftreg-io-widthbus-widthno-1-8-vno-mmcno-sdiodisable-wp#dma-cellsdma-channelssnps,block-sizesnps,prioritysnps,dma-masterssnps,data-widthinterrupts-extendedriscv,ndevserial0serial1serial2serial3serial4stdout-pathno-map