#88( hFcompulab,omap3-sbc-t3730compulab,omap3-cm-t3730ti,omap3630ti,omap3 +!7CompuLab SBC-T3730 with CM-T3730chosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/mmc@4809c000Q/ocp@68000000/mmc@480b4000V/ocp@68000000/mmc@480ad000[/ocp@68000000/serial@4806a000c/ocp@68000000/serial@4806c000k/ocp@68000000/serial@49020000s/ocp@68000000/serial@49042000{/dvi-connector/svideo-connectorcpus+cpu@0arm,cortex-a8cpucpupmu@54000000arm,cortex-a8-pmuT debugsssocti,omap-inframpu ti,omap3-mpu mpuiva ti,iva2.2 ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush + l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus +  pinmux@30 ti,omap3-padconfpinctrl-single08++<Qodefaultuart3-pinsnpmmc1-pins0green-led-pinsdss-dpi-common-pinsdss-dpi-cm-t35x-pins0ads7846-pinsmcspi1-pins i2c1-pinsmcbsp2-pins  smsc1-pinsj hsusb0-pins`rtvxz|~twl4030-pinsAmmc2-pins0(*,.02wl12xx-gpio-pins4%smsc2-pins tfp410-pins'i2c3-pinssb-t35-audio-amp-pins+sb-t35-usb-hub-pinsscm_conf@270sysconsimple-busp0+ p0pbias_regulator@2b0ti,pbias-omap3ti,pbias-omappbias_mmc_omap2430pbias_mmc_omap2430w@-clocks+clock@68 ti,clkselh+clock-mcbsp5-mux-fck@4ti,composite-mux-clock mcbsp5_mux_fck  clock-mcbsp3-mux-fck@0ti,composite-mux-clock mcbsp3_mux_fck clock-mcbsp4-mux-fck@2ti,composite-mux-clock mcbsp4_mux_fck mcbsp5_fckti,composite-clock clock@4 ti,clksel+clock-mcbsp1-mux-fck@2ti,composite-mux-clock mcbsp1_mux_fck clock-mcbsp2-mux-fck@6ti,composite-mux-clock mcbsp2_mux_fck mcbsp1_fckti,composite-clock mcbsp2_fckti,composite-clockmcbsp3_fckti,composite-clockmcbsp4_fckti,composite-clockclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \++<Qotwl4030-vpins-pins dss-dpi-cm-t3730-pins0 target-module@480a6000ti,sysc-omap2ti,syscH `DH `HH `Lrevsyscsyss( 5Cick+ H ` aes1@0 ti,omap3-aesPP  Utxrxtarget-module@480c5000ti,sysc-omap2ti,syscH PDH PHH PLrevsyscsyss( 5Cick+ H P aes2@0 ti,omap3-aesPPABUtxrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clock_Yosc_sys_ck@d40 ti,mux-clock @sys_ck@1270ti,divider-clocko|p#sys_clkout1@d70ti,gate-clock podpll3_x2_ckfixed-factor-clockdpll3_m2x2_ckfixed-factor-clock "dpll4_x2_ckfixed-factor-clock!corex2_fckfixed-factor-clock"$wkup_l4_ickfixed-factor-clock#ccorex2_d3_fckfixed-factor-clock$corex2_d5_fckfixed-factor-clock$clockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clock_omap_32k_fck fixed-clock_Ivirt_12m_ck fixed-clock_virt_13m_ck fixed-clock_]@virt_19200000_ck fixed-clock_$virt_26000000_ck fixed-clock_virt_38_4m_ck fixed-clock_Idpll4_ck@d00ti,omap3-dpll-per-j-type-clock## D 0!dpll4_m2_ck@d48ti,divider-clock!|? H%dpll4_m2x2_mul_ckfixed-factor-clock%&dpll4_m2x2_ck@d00ti,hsdiv-gate-clock&o 'omap_96m_alwon_fckfixed-factor-clock'3dpll3_ck@d00ti,omap3-dpll-core-clock## @ 0clock@1140 ti,clksel@+clock-dpll3-m3@16ti,divider-clock  dpll3_m3_ck|-clock-dpll4-m6@24ti,divider-clock  dpll4_m6_ck!|??clock-emu-src-mux@0 ti,mux-clock emu_src_mux_ck#()*wclock-pclk-fck@8ti,divider-clock  pclk_fck+|clock-pclkx2-fck@6ti,divider-clock  pclkx2_fck+|clock-atclk-fck@4ti,divider-clock  atclk_fck+|clock-traceclk-src-fck@2 ti,mux-clock traceclk_src_fck#()*,clock-traceclk-fck@11 ti,divider-clock  traceclk_fck,|dpll3_m3x2_mul_ckfixed-factor-clock-.dpll3_m3x2_ck@d00ti,hsdiv-gate-clock.o  /emu_core_alwon_ckfixed-factor-clock/(sys_altclk fixed-clock_6mcbsp_clks fixed-clock_ core_ckfixed-factor-clock 0dpll1_fck@940ti,divider-clock0o| @1dpll1_ck@904ti,omap3-dpll-clock#1  $ @ 4dpll1_x2_ckfixed-factor-clock2dpll1_x2m2_ck@944ti,divider-clock2| DFcm_96m_fckfixed-factor-clock34clock@d40 ti,clksel @+clock-dpll3-m2@27ti,divider-clock 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sys_clkout2C|@clkout2_src_ckti,composite-clockDECmpu_ckfixed-factor-clockFGarm_fck@924ti,divider-clockG $|emu_mpu_alwon_ckfixed-factor-clockG*clock@a40 ti,clksel @+clock-l3-ick@0ti,divider-clock l3_ick0|Hclock-l4-ick@2ti,divider-clock l4_ickH|Jclock-gpt10-mux-fck@6ti,composite-mux-clock gpt10_mux_fckI#Wclock-gpt11-mux-fck@7ti,composite-mux-clock gpt11_mux_fckI#Yclock-ssi-ssr-div-fck-3430es2@8ti,composite-divider-clock ssi_ssr_div_fck_3430es2$$ clock@c40 ti,clksel @+clock-rm-ick@1ti,divider-clock rm_ickJ|clock-gpt1-mux-fck@0ti,composite-mux-clock  gpt1_mux_fckI#bclock-usim-mux-fck@3ti,composite-mux-clock  usim_mux_fck(#KLMNOPQRSclock@a00 ti,clksel +clock-gpt10-gate-fck@11 ti,composite-gate-clock gpt10_gate_fck#Vclock-gpt11-gate-fck@12 ti,composite-gate-clock gpt11_gate_fck#Xclock-mmchs2-fck@25ti,wait-gate-clock  mmchs2_fckclock-mmchs1-fck@24ti,wait-gate-clock  mmchs1_fckclock-i2c3-fck@17ti,wait-gate-clock  i2c3_fckclock-i2c2-fck@16ti,wait-gate-clock  i2c2_fckclock-i2c1-fck@15ti,wait-gate-clock  i2c1_fckclock-mcbsp5-gate-fck@10 ti,composite-gate-clock mcbsp5_gate_fck  clock-mcbsp1-gate-fck@9 ti,composite-gate-clock mcbsp1_gate_fck  clock-mcspi4-fck@21ti,wait-gate-clock  mcspi4_fckTclock-mcspi3-fck@20ti,wait-gate-clock  mcspi3_fckTclock-mcspi2-fck@19ti,wait-gate-clock  mcspi2_fckTclock-mcspi1-fck@18ti,wait-gate-clock  mcspi1_fckTclock-uart2-fck@14ti,wait-gate-clock  uart2_fckTclock-uart1-fck@13 ti,wait-gate-clock  uart1_fckTclock-hdq-fck@22ti,wait-gate-clock hdq_fckUclock-modem-fck@31ti,omap3-interface-clock  modem_fck#clock-mspro-fck@23ti,wait-gate-clock  mspro_fckclock-ssi-ssr-gate-fck-3430es2@0 ti,composite-no-wait-gate-clock ssi_ssr_gate_fck_3430es2$clock-mmchs3-fck@30ti,wait-gate-clock  mmchs3_fckgpt10_fckti,composite-clockVWgpt11_fckti,composite-clockXYcore_96m_fckfixed-factor-clockZcore_48m_fckfixed-factor-clock:Tcore_12m_fckfixed-factor-clock[Ucore_l3_ickfixed-factor-clockH\clock@a10 ti,clksel +clock-sdrc-ick@1ti,wait-gate-clock  sdrc_ick\clock-mmchs2-ick@25ti,omap3-interface-clock  mmchs2_ick]clock-mmchs1-ick@24ti,omap3-interface-clock  mmchs1_ick]clock-hdq-ick@22ti,omap3-interface-clock hdq_ick]clock-mcspi4-ick@21ti,omap3-interface-clock  mcspi4_ick]clock-mcspi3-ick@20ti,omap3-interface-clock  mcspi3_ick]clock-mcspi2-ick@19ti,omap3-interface-clock  mcspi2_ick]clock-mcspi1-ick@18ti,omap3-interface-clock  mcspi1_ick]clock-i2c3-ick@17ti,omap3-interface-clock  i2c3_ick]clock-i2c2-ick@16ti,omap3-interface-clock  i2c2_ick]clock-i2c1-ick@15ti,omap3-interface-clock  i2c1_ick]clock-uart2-ick@14ti,omap3-interface-clock  uart2_ick]clock-uart1-ick@13 ti,omap3-interface-clock  uart1_ick]clock-gpt11-ick@12 ti,omap3-interface-clock  gpt11_ick]clock-gpt10-ick@11 ti,omap3-interface-clock  gpt10_ick]clock-mcbsp5-ick@10 ti,omap3-interface-clock  mcbsp5_ick]clock-mcbsp1-ick@9 ti,omap3-interface-clock  mcbsp1_ick]clock-omapctrl-ick@6ti,omap3-interface-clock  omapctrl_ick]clock-aes2-ick@28ti,omap3-interface-clock  aes2_ick]clock-sha12-ick@27ti,omap3-interface-clock  sha12_ick]clock-icr-ick@29ti,omap3-interface-clock icr_ick]clock-des2-ick@26ti,omap3-interface-clock  des2_ick]clock-mspro-ick@23ti,omap3-interface-clock  mspro_ick]clock-mailboxes-ick@7ti,omap3-interface-clock mailboxes_ick]clock-sad2d-ick@3ti,omap3-interface-clock  sad2d_ickHclock-hsotgusb-ick-3430es2@4"ti,omap3-hsotgusb-interface-clock hsotgusb_ick_3430es2\clock-ssi-ick-3430es2@0ti,omap3-ssi-interface-clock ssi_ick_3430es2^clock-mmchs3-ick@30ti,omap3-interface-clock  mmchs3_ick]gpmc_fckfixed-factor-clock\core_l4_ickfixed-factor-clockJ]clock@e00 ti,clksel+clock-dss-tv-fckti,gate-clock  dss_tv_fckBoclock-dss-96m-fckti,gate-clock  dss_96m_fckZoclock-dss2-alwon-fckti,gate-clock dss2_alwon_fck#oclock-dss1-alwon-fck-3430es2@0ti,dss-gate-clock dss1_alwon_fck_3430es2_dummy_ck fixed-clock_clock@c00 ti,clksel +clock-gpt1-gate-fck@0ti,composite-gate-clock gpt1_gate_fck#aclock-gpio1-dbck@3ti,gate-clock  gpio1_dbck`clock-wdt2-fck@5ti,wait-gate-clock  wdt2_fck`clock-sr1-fck@6ti,wait-gate-clock sr1_fck#clock-sr2-fck@7ti,wait-gate-clock sr2_fck#clock-usim-gate-fck@9 ti,composite-gate-clock usim_gate_fckZgpt1_fckti,composite-clockabwkup_32k_fckfixed-factor-clockI`clock@c10 ti,clksel +clock-wdt2-ick@5ti,omap3-interface-clock  wdt2_ickcclock-wdt1-ick@4ti,omap3-interface-clock  wdt1_ickcclock-gpio1-ick@3ti,omap3-interface-clock  gpio1_ickcclock-omap-32ksync-ick@2ti,omap3-interface-clock omap_32ksync_ickcclock-gpt12-ick@1ti,omap3-interface-clock  gpt12_ickcclock-gpt1-ick@0ti,omap3-interface-clock  gpt1_ickcclock-usim-ick@9 ti,omap3-interface-clock  usim_ickcper_96m_fckfixed-factor-clock3 per_48m_fckfixed-factor-clock:dclock@1000 ti,clksel+clock-uart3-fck@11 ti,wait-gate-clock  uart3_fckdclock-gpt2-gate-fck@3ti,composite-gate-clock gpt2_gate_fck#fclock-gpt3-gate-fck@4ti,composite-gate-clock gpt3_gate_fck#hclock-gpt4-gate-fck@5ti,composite-gate-clock gpt4_gate_fck#jclock-gpt5-gate-fck@6ti,composite-gate-clock gpt5_gate_fck#lclock-gpt6-gate-fck@7ti,composite-gate-clock gpt6_gate_fck#nclock-gpt7-gate-fck@8ti,composite-gate-clock gpt7_gate_fck#pclock-gpt8-gate-fck@9 ti,composite-gate-clock gpt8_gate_fck#rclock-gpt9-gate-fck@10 ti,composite-gate-clock gpt9_gate_fck#tclock-gpio6-dbck@17ti,gate-clock  gpio6_dbckeclock-gpio5-dbck@16ti,gate-clock  gpio5_dbckeclock-gpio4-dbck@15ti,gate-clock  gpio4_dbckeclock-gpio3-dbck@14ti,gate-clock  gpio3_dbckeclock-gpio2-dbck@13 ti,gate-clock  gpio2_dbckeclock-wdt3-fck@12 ti,wait-gate-clock  wdt3_fckeclock-mcbsp2-gate-fck@0ti,composite-gate-clock mcbsp2_gate_fck clock-mcbsp3-gate-fck@1ti,composite-gate-clock mcbsp3_gate_fck clock-mcbsp4-gate-fck@2ti,composite-gate-clock mcbsp4_gate_fck clock-uart4-fck@18ti,wait-gate-clock  uart4_fckdclock@1040 ti,clksel@+clock-gpt2-mux-fck@0ti,composite-mux-clock  gpt2_mux_fckI#gclock-gpt3-mux-fck@1ti,composite-mux-clock  gpt3_mux_fckI#iclock-gpt4-mux-fck@2ti,composite-mux-clock  gpt4_mux_fckI#kclock-gpt5-mux-fck@3ti,composite-mux-clock  gpt5_mux_fckI#mclock-gpt6-mux-fck@4ti,composite-mux-clock  gpt6_mux_fckI#oclock-gpt7-mux-fck@5ti,composite-mux-clock  gpt7_mux_fckI#qclock-gpt8-mux-fck@6ti,composite-mux-clock  gpt8_mux_fckI#sclock-gpt9-mux-fck@7ti,composite-mux-clock  gpt9_mux_fckI#ugpt2_fckti,composite-clockfggpt3_fckti,composite-clockhigpt4_fckti,composite-clockjkgpt5_fckti,composite-clocklmgpt6_fckti,composite-clocknogpt7_fckti,composite-clockpqgpt8_fckti,composite-clockrsgpt9_fckti,composite-clocktuper_32k_alwon_fckfixed-factor-clockIeper_l4_ickfixed-factor-clockJvclock@1010 ti,clksel+clock-gpio6-ick@17ti,omap3-interface-clock  gpio6_ickvclock-gpio5-ick@16ti,omap3-interface-clock  gpio5_ickvclock-gpio4-ick@15ti,omap3-interface-clock  gpio4_ickvclock-gpio3-ick@14ti,omap3-interface-clock  gpio3_ickvclock-gpio2-ick@13 ti,omap3-interface-clock  gpio2_ickvclock-wdt3-ick@12 ti,omap3-interface-clock  wdt3_ickvclock-uart3-ick@11 ti,omap3-interface-clock  uart3_ickvclock-uart4-ick@18ti,omap3-interface-clock  uart4_ickvclock-gpt9-ick@10 ti,omap3-interface-clock  gpt9_ickvclock-gpt8-ick@9 ti,omap3-interface-clock  gpt8_ickvclock-gpt7-ick@8ti,omap3-interface-clock  gpt7_ickvclock-gpt6-ick@7ti,omap3-interface-clock  gpt6_ickvclock-gpt5-ick@6ti,omap3-interface-clock  gpt5_ickvclock-gpt4-ick@5ti,omap3-interface-clock  gpt4_ickvclock-gpt3-ick@4ti,omap3-interface-clock  gpt3_ickvclock-gpt2-ick@3ti,omap3-interface-clock  gpt2_ickvclock-mcbsp2-ick@0ti,omap3-interface-clock  mcbsp2_ickvclock-mcbsp3-ick@1ti,omap3-interface-clock  mcbsp3_ickvclock-mcbsp4-ick@2ti,omap3-interface-clock  mcbsp4_ickvemu_src_ckti,clkdm-gate-clockw+secure_32k_fck fixed-clock_xgpt12_fckfixed-factor-clockxwdt1_fckfixed-factor-clockxsecurity_l4_ick2fixed-factor-clockJyclock@a14 ti,clksel +clock-aes1-ick@3ti,omap3-interface-clock  aes1_ickyclock-rng-ick@2ti,omap3-interface-clock rng_ickyclock-sha11-ick@1ti,omap3-interface-clock  sha11_ickyclock-des1-ick@0ti,omap3-interface-clock  des1_ickyclock-pka-ick@4ti,omap3-interface-clock pka_ickzclock@f00 ti,clksel+clock-cam-mclk@0ti,gate-clock  cam_mclk{clock-csi2-96m-fck@1ti,gate-clock  csi2_96m_fckcam_ick@f10!ti,omap3-no-wait-interface-clockJosecurity_l3_ickfixed-factor-clockHzssi_l4_ickfixed-factor-clockJ^sr_l4_ickfixed-factor-clockJdpll2_fck@40ti,divider-clock0o|@|dpll2_ck@4ti,omap3-dpll-clock#|$@4+3}dpll2_m2_ck@44ti,divider-clock}|D~iva2_ck@0ti,wait-gate-clock~oclock@a18 ti,clksel G+clock-mad2d-ick@3ti,omap3-interface-clock  mad2d_ickHclock-usbtll-ick@2ti,omap3-interface-clock  usbtll_ick]ssi_ssr_fck_3430es2ti,composite-clockssi_sst_fck_3430es2fixed-factor-clocksys_d2_ckfixed-factor-clock#Komap_96m_d2_fckfixed-factor-clockZLomap_96m_d4_fckfixed-factor-clockZMomap_96m_d8_fckfixed-factor-clockZNomap_96m_d10_fckfixed-factor-clockZ Odpll5_m2_d4_ckfixed-factor-clockPdpll5_m2_d8_ckfixed-factor-clockQdpll5_m2_d16_ckfixed-factor-clockRdpll5_m2_d20_ckfixed-factor-clockSusim_fckti,composite-clockdpll5_ck@d04ti,omap3-dpll-clock##  $ L 4+dpll5_m2_ck@d50ti,divider-clock| Psgx_gate_fck@b00ti,composite-gate-clock0o core_d3_ckfixed-factor-clock0core_d4_ckfixed-factor-clock0core_d6_ckfixed-factor-clock0omap_192m_alwon_fckfixed-factor-clock'core_d2_ckfixed-factor-clock0sgx_mux_fck@b40ti,composite-mux-clock 4 @sgx_fckti,composite-clocksgx_ick@b10ti,wait-gate-clockH ocpefuse_fck@a08ti,gate-clock# ots_fck@a08ti,gate-clockI ousbtll_fck@a08ti,wait-gate-clock odss_ick_3430es2@e10ti,omap3-dss-interface-clockJousbhost_120m_fck@1400ti,gate-clockousbhost_48m_fck@1400ti,dss-gate-clock:ousbhost_ick@1410ti,omap3-dss-interface-clockJoclockdomainscore_l3_clkdmti,clockdomaindpll3_clkdmti,clockdomaindpll1_clkdmti,clockdomainper_clkdmti,clockdomainlemu_clkdmti,clockdomain+dpll4_clkdmti,clockdomain!wkup_clkdmti,clockdomain$dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaincam_clkdmti,clockdomainiva2_clkdmti,clockdomaindpll2_clkdmti,clockdomain}d2d_clkdmti,clockdomain dpll5_clkdmti,clockdomainsgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain target-module@48320000ti,sysc-omap2ti,syscH2H2 revsysc5`fckick+ H2counter@0ti,omap-counter32k interrupt-controller@48200000ti,omap3-intc<+H target-module@48056000ti,sysc-omap2ti,syscH`H`,H`(revsyscsyss(# T 5C\ick+ H`dma-controller@0ti,omap3630-sdmati,omap-sdma bm z`gpio@48310000ti,omap3-gpioH1 gpio1<+gpio@49050000ti,omap3-gpioI gpio2<+gpio@49052000ti,omap3-gpioI  gpio3<+gpio@49054000ti,omap3-gpioI@  gpio4<+gpio@49056000ti,omap3-gpioI`! gpio5<+gpio@49058000ti,omap3-gpioI" gpio6<+ serial@4806a000ti,omap3-uartH HP12Utxrx uart1_lserial@4806c000ti,omap3-uartHIP34Utxrx uart2_lserial@49020000ti,omap3-uartIJP56Utxrx uart3_ldefaulti2c@48070000 ti,omap3-i2cH8+ i2c1default_at24@50 atmel,24c02Ptwl@48H  ti,twl4030<+defaultaudioti,twl4030-audiocodecrtcti,twl4030-rtc bciti,twl4030-bci  vacwatchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2&regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1 ' regulator-vdacti,twl4030-vdacw@w@regulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1:0regulator-vmmc2ti,twl4030-vmmc2:0regulator-vusb1v5ti,twl4030-vusb1v5regulator-vusb1v8ti,twl4030-vusb1v8regulator-vusb3v1ti,twl4030-vusb3v1regulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2w@w@regulator-vsimti,twl4030-vsimw@-gpioti,twl4030-gpio<+ !twl4030-usbti,twl4030-usb "0>Gpwmti,twl4030-pwmRpwmledti,twl4030-pwmledRpwrbuttonti,twl4030-pwrbuttonkeypadti,twl4030-keypad]m$0iglj. madcti,twl4030-madci2c@48072000 ti,omap3-i2cH 9+ i2c2i2c@48060000 ti,omap3-i2cH=+ i2c3_defaultat24@50 atmel,24c02Pmailbox@48094000ti,omap3-mailbox mailboxH @mbox-dsp  spi@48098000ti,omap2-mcspiH A+ mcspi1@P#$%&'()* Utx0rx0tx1rx1tx2rx2tx3rx3defaultads7846@0default ti,ads7846`  &/8AQaq spi@4809a000ti,omap2-mcspiH B+ mcspi2 P+,-.Utx0rx0tx1rx1spi@480b8000ti,omap2-mcspiH [+ mcspi3 PUtx0rx0tx1rx1spi@480ba000ti,omap2-mcspiH 0+ mcspi4PFGUtx0rx01w@480b2000 ti,omap3-1wH : hdq1wmmc@4809c000ti,omap3-hsmmcH S mmc1P=>Utxrxdefaultmmc@480b4000ti,omap3-hsmmcH @V mmc2P/0Utxrxdefault+wlcore@2 ti,wl1271 Immc@480ad000ti,omap3-hsmmcH ^ mmc3PMNUtxrx disabledmmu@480bd400ti,omap2-iommuH  mmu_isp%mmu@5d000000ti,omap2-iommu] mmu_iva disabledwdt@48314000 ti,omap3-wdtH1@  wd_timer2mcbsp@48074000ti,omap3-mcbspH@mpu ;< 5commontxrxE mcbsp1P Utxrxfck disabledtarget-module@480a0000ti,sysc-omap2ti,syscH <H @H Drevsyscsyss(5Cick+ H rng@0 ti,omap2-rng 4mcbsp@49022000ti,omap3-mcbspI I mpusidetone>?5commontxrxsidetoneE mcbsp2mcbsp2_sidetoneP!"Utxrxfckickokaydefault$mcbsp@49024000ti,omap3-mcbspI@I mpusidetoneYZ5commontxrxsidetoneE mcbsp3mcbsp3_sidetonePUtxrxfckick disabledmcbsp@49026000ti,omap3-mcbspI`mpu 67 5commontxrxE mcbsp4PUtxrxfckT disabledmcbsp@48096000ti,omap3-mcbspH `mpu QR 5commontxrxE mcbsp5PUtxrxfck disabledsham@480c3000ti,omap3-sham shamH 0d1PEUrxtarget-module@48318000ti,sysc-omap2-timerti,syscH1H1H1revsyscsyss(' 5Cfckick+ H1eytimer@0ti,omap3430-timerfck%Itarget-module@49032000ti,sysc-omap2-timerti,syscI I I revsyscsyss(' 5Cfckick+ I timer@0ti,omap3430-timer&timer@49034000ti,omap3430-timerI@' timer3timer@49036000ti,omap3430-timerI`( timer4timer@49038000ti,omap3430-timerI) timer5timer@4903a000ti,omap3430-timerI* timer6timer@4903c000ti,omap3430-timerI+ timer7timer@4903e000ti,omap3430-timerI, timer8timer@49040000ti,omap3430-timerI- timer9timer@48086000ti,omap3430-timerH`. timer10timer@48088000ti,omap3430-timerH/ timer11target-module@48304000ti,sysc-omap2-timerti,syscH0@H0@H0@revsyscsyss(' 5Cfckick+ H0@timer@0ti,omap3430-timer_usbhstll@48062000 ti,usbhs-tllH N  usb_tll_hsusbhshost@48064000ti,usbhs-hostH@  usb_host_hs+ ehci-phy ehci-phyohci@48064400ti,ohci-omap3HDLehci@48064800 ti,ehci-omapHHMgpmc@6e000000ti,omap3430-gpmc gpmcnPUrxtx#+<+0,-nand@0,0ti,omap2-nand  5DVswftxxxxZZ!H0<Jx[xl~Z+partition@0xloaderpartition@80000ubootpartition@260000uboot environment&partition@2a0000linux*@partition@6a0000rootfsjethernet@gpmcsmsc,lan9221smsc,lan9115Dft(--J[!xK0K ~l !  1  ? Ldefault    ethernet@4,0smsc,lan9221smsc,lan9115default   Dft(--J[!xK0K ~l !  1  ? Ltarget-module@480ab000ti,sysc-omap2ti,syscH H H revsyscsyss( T 5Cfck+ H usb@0ti,omap3-musb\]5mcdma b m u default ~  usb2-phyB 2dss@48050000 ti,omap3-dssHokay  dss_corefck+defaultdispc@48050400ti,omap3-dispcH  dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H protophypll disabled  dss_dsi1 fcksys_clk+encoder@48050800ti,omap3-rfbiH disabled  dss_rfbifckickencoder@48050c00ti,omap3-vencH okay  dss_vencfcktv_dac_clk portendpoint  #portendpoint  (ssi-controller@48058000 ti,omap3-ssi ssiokayHHsysgddG5gdd_mpu+  ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portHHtxrxCDssi-port@4805b000ti,omap3-ssi-portHHtxrxEFserial@49042000ti,omap3-uartI PPQRUtxrx uart4_lregulator-abb-mpu ti,abb-v1 abb_mpu_iva+H0rH0hbase-addressint-address #  ` sO7pinmux@480025a0 ti,omap3-padconfpinctrl-singleH%\++<Qoisp@480bc000 ti,omap3-ispH H   %ports+bandgap@48002524H%$ti,omap36xx-bandgap 1target-module@480cb000ti,sysc-omap3630-srti,sysc smartreflex_coreH 8sysc( 5fck+ H smartreflex@0ti,omap3-smartreflex-coretarget-module@480c9000ti,sysc-omap3630-srti,sysc smartreflex_mpu_ivaH 8sysc( 5fck+ H smartreflex@480c9000ti,omap3-smartreflex-mpu-ivatarget-module@50000000ti,sysc-omap4ti,syscPP revsysc T 5fckick+ Pgpu@0#ti,omap3630-gpuimg,powervr-sgx530opp-tableoperating-points-v2-ti-cpuopp-50-300000000 G Nssssss \ mopp-100-600000000 G#F NOOOOOO \opp-130-800000000 G/ N777777 \opp-1000000000 G; N \ yopp-supplyti,omap-opp-supply thermal-zonescpu-thermal   N  tripscpu_alert 8 passivecpu_crit _  criticalcooling-mapsmap0  memory@80000000memoryleds gpio-ledsdefaultledb cm-t3x:green   heartbeathsusb1_power_regregulator-fixed hsusb1_vbus2Z2Z 'p hsusb2_power_regregulator-fixed hsusb2_vbus2Z2Z 'p"hsusb1_phyusb-nop-xceiv G 8!hsusb2-phy-pinsusb-nop-xceiv"G 8!ads7846-regregulator-fixed ads7846-reg2Z2Zsvideo-connectorsvideo-connectortvportendpoint #soundti,omap-twl4030 Dcm-t35 M$regulator-vddvarioregulator-fixed vddvario V regulator-vdd33aregulator-fixedvdd33a V wl12xx_vmmc2regulator-fixedvw1271default%w@w@   'N  jwl12xx_vaux2regulator-fixedvwl1271_vaux2w@w@ }&encoder ti,tfp410 default'ports+port@0endpoint (port@1endpoint )*dvi-connectordvi-connectordviportendpoint *)audio_ampregulator-fixed audio_ampdefault+  V compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2serial3display0display1device_typeregclocksclock-namesclock-latencyoperating-points-v2vbb-supply#cooling-cellscpu0-supplyphandleinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsclock-output-namesreg-namesti,sysc-maskti,sysc-sidleti,syss-maskdmasdma-namesclock-frequencyti,bit-shiftti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,dividersti,low-power-stopti,lockti,low-power-bypass#ssize-cellsti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpagesizebci3v1-supplyio-channelsio-channel-namesti,use-ledsti,pullupsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnslinux,keymap#io-channel-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csvcc-supplyspi-max-frequencypendown-gpioti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,debounce-maxti,debounce-tolti,debounce-repwakeup-sourceti,dual-voltpbias-supplybus-widthvmmc-supplyvqmmc-supplynon-removablecap-power-off-cardref-clock-frequencystatus#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureport1-modeport2-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinsnand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,page-burst-access-nsgpmc,access-nsgpmc,cycle2cycle-delay-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nslabelbank-widthgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsengpmc,bus-turnaround-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addressmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowervdda-supplyremote-endpointti,channelsdata-linesti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modeti,absolute-max-voltage-uvpolling-delay-passivepolling-delaycoefficientsthermal-sensorstemperaturehysteresistripcooling-devicegpioslinux,default-triggerstartup-delay-usreset-gpiosti,modelti,mcbspregulator-always-onenable-active-highvin-supplypowerdown-gpios